Commit message (Collapse) | Author | Age | Files | Lines | ||
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| | * | | remove time_sync and master_timer. | Matt Ettus | 2010-01-18 | 3 | -22/+82 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Master timer replaced with simple_timer which needs new memory map and control functions. it allows onetime and periodic interrupts. Copied from quad_radio time_sync functionality will go in time_64bit. Right now it only does external SMA connector, not mimo connector | |||||
| | * | | allow setting time immediately in cases where there is no external pps input | Matt Ettus | 2010-01-18 | 1 | -4/+5 | |
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| | * | | allow processor to read back vrt time over readback mux | Matt Ettus | 2010-01-18 | 1 | -2/+2 | |
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| | * | | proper time sync to pps | Matt Ettus | 2010-01-18 | 2 | -5/+30 | |
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| * | | | just debug pin changes | Matt Ettus | 2010-01-25 | 2 | -1/+12 | |
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| * | | | typo caused the tx udp chain to be disconnected | Matt Ettus | 2010-01-23 | 1 | -1/+1 | |
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| * | | | moved into subdir | Josh Blum | 2010-01-22 | 661 | -491/+0 | |
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| * | | | should fix the endless packet bug | Matt Ettus | 2010-01-18 | 1 | -1/+3 | |
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| * | | | yet another typo | Matt Ettus | 2010-01-15 | 1 | -1/+1 | |
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| * | | | yet more debug lines | Matt Ettus | 2010-01-15 | 2 | -4/+9 | |
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| * | | | typo | Matt Ettus | 2010-01-15 | 1 | -1/+1 | |
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| * | | | add debug pins to find the problem with lost eof in the udp core | Matt Ettus | 2010-01-15 | 1 | -2/+2 | |
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| * | | | try a width that works... | Matt Ettus | 2010-01-14 | 1 | -1/+2 | |
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| * | | | try proper reset | Matt Ettus | 2010-01-14 | 1 | -1/+1 | |
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| * | | | forgot to declare wire | Matt Ettus | 2010-01-14 | 1 | -1/+3 | |
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| * | | | debug state | Matt Ettus | 2010-01-14 | 3 | -5/+12 | |
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| * | | | empty file, it is actually located in the control directory | Matt Ettus | 2010-01-14 | 1 | -0/+0 | |
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| * | | | make it match the 36 bit wide version | Matt Ettus | 2010-01-14 | 2 | -6/+8 | |
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| * | | | better debug pins | Matt Ettus | 2010-01-05 | 2 | -9/+9 | |
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| * | | | more typo fixes. | Matt Ettus | 2010-01-05 | 1 | -3/+3 | |
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| * | | | typo fix | Matt Ettus | 2010-01-05 | 1 | -1/+1 | |
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| * | | | actually connect the ports -- why this isn't flagged as an error I'll never know | Matt Ettus | 2010-01-05 | 1 | -3/+8 | |
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| * | | | place udp core in the memory space | Matt Ettus | 2010-01-05 | 2 | -9/+12 | |
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| * | | | Merge branch 'wip/usrp2' of http://gnuradio.org/git/matt into wip/usrp2 | Josh Blum | 2010-01-05 | 2 | -5/+30 | |
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| | * | | | proper time sync to pps | Matt Ettus | 2009-12-22 | 2 | -5/+30 | |
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| * | | | Merge branch 'udp' of http://gnuradio.org/git/matt into wip/usrp2 | Josh Blum | 2010-01-05 | 13 | -49/+1073 | |
| |\ \ \ | | |/ / | |/| | | | | | | | | | | Conflicts: usrp2/fpga/top/u2_rev3/Makefile | |||||
| | * | | never should have checked in this generated binary file | Matt Ettus | 2009-12-21 | 1 | -21251/+0 | |
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| | * | | barebones udp support. Compiles, but untested. | Matt Ettus | 2009-12-21 | 9 | -18/+538 | |
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| | * | | 19-bit fifo handling for receive side of eth/udp system | Matt Ettus | 2009-12-21 | 2 | -45/+83 | |
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| | * | | 19 bit wide interface in prep for connection to UDP/IP state machines. | Matt Ettus | 2009-12-21 | 5 | -0/+21717 | |
| | | | | | | | | | | | | | | | | TX side done, not rx yet. Not tested, but it does compile. | |||||
| * | | | cleaned up the main ibs state machine | Matt Ettus | 2009-12-14 | 1 | -9/+22 | |
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| * | | | dsp_core_tx now has setting reg base settable from u2_core. underrun bug in ↵ | Matt Ettus | 2009-12-14 | 3 | -10/+9 | |
| | | | | | | | | | | | | | | | | vrt fixed | |||||
| * | | | changed debug pins to see incoming data | Matt Ettus | 2009-12-12 | 1 | -3/+4 | |
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| * | | | reorder the memory map | Matt Ettus | 2009-12-11 | 2 | -2/+2 | |
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| * | | | put new setting reg into the address space in the right place | Matt Ettus | 2009-12-11 | 1 | -1/+1 | |
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| * | | | only pull from input fifo when really consuming or pushing into the next fifo | Matt Ettus | 2009-12-11 | 1 | -1/+1 | |
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| * | | | Add ability to clear state out when there is an underrun | Matt Ettus | 2009-12-11 | 1 | -1/+6 | |
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| * | | | fixed typo in u2_core.v resulting in unconnected net. added debug pins | Matt Ettus | 2009-12-11 | 3 | -14/+35 | |
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| * | | | ignore save files | Matt Ettus | 2009-12-09 | 1 | -0/+1 | |
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| * | | | First cut at vita tx, whole thing compiles | Matt Ettus | 2009-12-09 | 3 | -27/+37 | |
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| * | | | flag packets which arrive way too early so the device doesn't sit there forever. | Matt Ettus | 2009-12-09 | 1 | -2/+4 | |
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| * | | | very basic packet sending works | Matt Ettus | 2009-12-09 | 2 | -140/+50 | |
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| * | | | seems to correctly deframe packets. now need to consume them. | Matt Ettus | 2009-12-08 | 1 | -12/+23 | |
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| * | | | progress on vita_tx. it compiles now, need to work on vita_tx_control. | Matt Ettus | 2009-12-08 | 3 | -239/+182 | |
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| * | | | make the testbench work in this environment, without the crossclock settings bus | Matt Ettus | 2009-12-08 | 3 | -5/+8 | |
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| * | | | be a little more PC about it | Matt Ettus | 2009-11-18 | 1 | -5/+9 | |
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| * | | | mostly just copied over from the rx side. Still needs a lot of work. | Matt Ettus | 2009-11-18 | 3 | -13/+221 | |
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| * | | | forgot to declare wires | Matt Ettus | 2009-11-06 | 1 | -0/+4 | |
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| * | | | moved regs around for vita49 | Matt Ettus | 2009-11-05 | 2 | -12/+13 | |
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| * | | | vita rx instead of rx_control. Ready for firmware testing. Misses timing ↵ | Matt Ettus | 2009-11-05 | 4 | -4/+48 | |
| | | | | | | | | | | | | | | | | by a little bit, will worry later. |