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authorMatt Ettus <matt@ettus.com>2010-01-14 18:20:08 -0800
committerMatt Ettus <matt@ettus.com>2010-01-14 18:20:08 -0800
commit7843047706a5fb57c041d79cb4a9da3ce2c8f16a (patch)
treed2b60548f0fb356fd38fc2f83717ac13a2b72c27
parent9d14a30133c8aa8ddd13236426c0065e07a3189e (diff)
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try a width that works...
-rw-r--r--simple_gemac/simple_gemac_wrapper19.v3
1 files changed, 2 insertions, 1 deletions
diff --git a/simple_gemac/simple_gemac_wrapper19.v b/simple_gemac/simple_gemac_wrapper19.v
index e13fd29ad..6cdbd1a59 100644
--- a/simple_gemac/simple_gemac_wrapper19.v
+++ b/simple_gemac/simple_gemac_wrapper19.v
@@ -101,7 +101,8 @@ module simple_gemac_wrapper19
.ll_src_rdy_n(rx_ll_src_rdy2_n), .ll_dst_rdy_n(rx_ll_dst_rdy2_n),
.f19_data(rx_f19_data_int1), .f19_src_rdy_o(rx_f19_src_rdy_int1), .f19_dst_rdy_i(rx_f19_dst_rdy_int1));
- fifo_2clock_cascade #(.WIDTH(19), .SIZE(RXFIFOSIZE)) rx_2clk_fifo
+ //fifo_2clock_cascade #(.WIDTH(19), .SIZE(RXFIFOSIZE)) rx_2clk_fifo
+ fifo_2clock_cascade #(.WIDTH(36), .SIZE(RXFIFOSIZE)) rx_2clk_fifo
(.wclk(rx_clk), .datain(rx_f19_data_int1),
.src_rdy_i(rx_f19_src_rdy_int1), .dst_rdy_o(rx_f19_dst_rdy_int1), .space(rx_fifo_space),
.rclk(sys_clk), .dataout(rx_f19_data),