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| * | Adds capability to independently delay the Auto T/R switching signal by a ↵jcorgan2007-04-165-2/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | configurable number of clock ticks, to allow users to precisely align their T/R output with the pipeline delays in the transmitter. There are two new registers: FR_ATR_TX_DELAY (7'd2) FR_ATR_RX_DELAY (7'd3) ...and the corresponding db_base.py methods to set them: db_base.set_atr_tx_delay(clock_ticks) db_base.set_atr_rx_delay(clock_ticks) These methods are inherited by all the daughterboard objects so you can call them from your scripts as: subdev.set_atr_tx_delay(...) ...where 'subdev' represents the daughtercard object you're working with. The FPGA synthesis for the 2 RXHB, 2 TX case expands from 95% to 96%, with no additional synthesis messages or impact on timing. git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@5022 221aa14e-8319-0410-a670-987f0aec2ac5
| * | New FPGA binaries (.rbfs). These include fixes for the scaling in the CIC ↵eb2007-04-024-0/+0
| | | | | | | | | | | | | | | | | | decimator so that signals are now roughly leveled, independent of the decimation rate. Decimating by 44 now works too ;) git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@4848 221aa14e-8319-0410-a670-987f0aec2ac5
| * | registered to meet timingmatt2007-03-301-2/+6
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| * | copied usrp_inband_usb from -r4809 features/inband-usb into trunkeb2007-03-287-0/+1588
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| * | proper shifting for the cic decim now keeps signals roughly leveledmatt2007-03-203-20/+104
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| * | if you ever tried to interpolate by 44 it didn't work. now it does.matt2007-03-201-1/+1
| | | | | | | | | | | | git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@4783 221aa14e-8319-0410-a670-987f0aec2ac5
| * | removed a parametermatt2007-03-201-6/+6
| | | | | | | | | | | | git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@4782 221aa14e-8319-0410-a670-987f0aec2ac5
| * | allow for varying the bitwidthmatt2007-03-201-1/+2
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| * | added commentmatt2007-03-201-1/+3
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| * | added comments, removed dead codematt2007-03-201-10/+6
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| * | Refactored FPGA *.vh files. Moved common pieces to toplevel/include.eb2007-03-0519-351/+145
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| * | Add new standard configuration for 1 RX w/ half-band, 1 TXeb2007-03-033-1/+75
| | | | | | | | | | | | git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@4695 221aa14e-8319-0410-a670-987f0aec2ac5
| * | updated qsf file to Quartus 6.1. No semantic changeseb2007-03-031-11/+11
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| * | fixed commenteb2007-02-261-1/+1
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| * | fixed commenteb2007-02-261-1/+1
| | | | | | | | | | | | git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@4655 221aa14e-8319-0410-a670-987f0aec2ac5
| * | Applied patch from Brett Trotter that stuffs zeros into the head of the tx ↵eb2007-01-176-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | signal processing pipeline when the Tx FIFO is empty. This results in the DACs outputing zeros when there's no data, unless the tx pipeline is disabled on the host. git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@4287 221aa14e-8319-0410-a670-987f0aec2ac5
| * | removed unused/out-of-date bus_interface.veb2007-01-142-214/+0
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| * | latest version of quartusmatt2006-11-201-1/+1
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| * | optimized halfband coefficients, courtesy of Larry Doolittlematt2006-11-011-8/+8
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| * | Partial fix for ticket:81jcorgan2006-10-041-0/+1
| | | | | | | | | | | | git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@3709 221aa14e-8319-0410-a670-987f0aec2ac5
| * | New rbfs. These were compiled using Quartus 6.0 sp1 and include the ↵eb2006-09-274-0/+0
| | | | | | | | | | | | | | | | | | post-ADC / pre-DDC digital rssi measurement code. git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@3667 221aa14e-8319-0410-a670-987f0aec2ac5
| * | Updated FSF address in all files. Fixes ticket:51eb2006-09-1352-57/+57
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| * | Houston, we have a trunk.jcorgan2006-08-03171-0/+23027
| / | | | | | | git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@3122 221aa14e-8319-0410-a670-987f0aec2ac5
* | Moved usrp2 fpga files into usrp2 subdir.Josh Blum2010-01-22641-491/+0
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| * moved fifos around, now easier to see where they are and how bigMatt Ettus2010-03-252-17/+30
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| * bigger fifo on UDP TX path, to possibly fix overruns on decim=4Matt Ettus2010-03-241-2/+11
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| * Xilinx ISE is incorrectly parsing the verilog case statement, this is a ↵Matt Ettus2010-03-241-1/+7
| | | | | | | | workaround
| * pps and vita time debug pinsMatt Ettus2010-03-231-3/+6
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| * ignore emacs backup filesMatt Ettus2010-03-231-0/+1
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| * more debug for fixing E'sMatt Ettus2010-03-102-6/+13
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| * better debug pins for going after cascading E'sMatt Ettus2010-03-101-1/+5
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| * copy in wrong placeMatt Ettus2010-03-101-60/+0
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| * copied over from quad radioMatt Ettus2010-02-081-0/+60
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| * Merge commit '8d19387a8642caf74179bdcb7eddf1936f473e53' into udpMatt Ettus2010-01-255-34/+103
| |\ | | | | | | | | | | | | | | | | | | | | | Merge latest VRT changes into UDP branch. Merged from 1 behind the head of VRT because the head moved things around and confused git Conflicts: usrp2/timing/time_64bit.v usrp2/top/u2_core/u2_core.v
| | * speed up timing by ignoring the too_early error. We'll need to FIXME this laterMatt Ettus2010-01-191-2/+5
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| | * Added set time and set time at next pps. Removed the old sync pps commands, ↵Josh Blum2010-01-181-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | they dont make sense to use anymore. Replaced the mimo config with clock config. The clock config handles the pps and the reference. Modified the memory map and internal calls to reflect the fpga changes.
| | * moved around regs, added a bit to allow for alternate PPS sourceMatt Ettus2010-01-181-4/+10
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| | * remove time_sync and master_timer.Matt Ettus2010-01-183-22/+82
| | | | | | | | | | | | | | | | | | | | | | | | Master timer replaced with simple_timer which needs new memory map and control functions. it allows onetime and periodic interrupts. Copied from quad_radio time_sync functionality will go in time_64bit. Right now it only does external SMA connector, not mimo connector
| | * allow setting time immediately in cases where there is no external pps inputMatt Ettus2010-01-181-4/+5
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| | * allow processor to read back vrt time over readback muxMatt Ettus2010-01-181-2/+2
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| | * proper time sync to ppsMatt Ettus2010-01-182-5/+30
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| * | just debug pin changesMatt Ettus2010-01-252-1/+12
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| * | typo caused the tx udp chain to be disconnectedMatt Ettus2010-01-231-1/+1
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| * | moved into subdirJosh Blum2010-01-22661-491/+0
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| * | should fix the endless packet bugMatt Ettus2010-01-181-1/+3
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| * | yet another typoMatt Ettus2010-01-151-1/+1
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| * | yet more debug linesMatt Ettus2010-01-152-4/+9
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| * | typoMatt Ettus2010-01-151-1/+1
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| * | add debug pins to find the problem with lost eof in the udp coreMatt Ettus2010-01-151-2/+2
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| * | try a width that works...Matt Ettus2010-01-141-1/+2
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