diff options
Diffstat (limited to 'fpga/usrp3/top/x400/regmap/rfdc_timing_regmap_utils.vh')
| -rw-r--r-- | fpga/usrp3/top/x400/regmap/rfdc_timing_regmap_utils.vh | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/fpga/usrp3/top/x400/regmap/rfdc_timing_regmap_utils.vh b/fpga/usrp3/top/x400/regmap/rfdc_timing_regmap_utils.vh new file mode 100644 index 000000000..545d31ff7 --- /dev/null +++ b/fpga/usrp3/top/x400/regmap/rfdc_timing_regmap_utils.vh @@ -0,0 +1,45 @@ +// +// Copyright 2021 Ettus Research, A National Instruments Company +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// +// Module: rfdc_timing_regmap_utils.vh +// Description: +// The constants in this file are autogenerated by XmlParse. + +//=============================================================================== +// A numerically ordered list of registers and their HDL source files +//=============================================================================== + + // NCO_RESET_REG : 0x0 (rfdc_timing_control.v) + // GEARBOX_RESET_REG : 0x4 (rfdc_timing_control.v) + +//=============================================================================== +// RegTypes +//=============================================================================== + +//=============================================================================== +// Register Group RFDC_TIMING_REGS +//=============================================================================== + + // NCO_RESET_REG Register (from rfdc_timing_control.v) + localparam NCO_RESET_REG = 'h0; // Register Offset + localparam NCO_RESET_REG_SIZE = 32; // register width in bits + localparam NCO_RESET_REG_MASK = 32'h3; + localparam NCO_RESET_START_SIZE = 1; //NCO_RESET_REG:NCO_RESET_START + localparam NCO_RESET_START_MSB = 0; //NCO_RESET_REG:NCO_RESET_START + localparam NCO_RESET_START = 0; //NCO_RESET_REG:NCO_RESET_START + localparam NCO_RESET_DONE_SIZE = 1; //NCO_RESET_REG:NCO_RESET_DONE + localparam NCO_RESET_DONE_MSB = 1; //NCO_RESET_REG:NCO_RESET_DONE + localparam NCO_RESET_DONE = 1; //NCO_RESET_REG:NCO_RESET_DONE + + // GEARBOX_RESET_REG Register (from rfdc_timing_control.v) + localparam GEARBOX_RESET_REG = 'h4; // Register Offset + localparam GEARBOX_RESET_REG_SIZE = 32; // register width in bits + localparam GEARBOX_RESET_REG_MASK = 32'h3; + localparam ADC_RESET_SIZE = 1; //GEARBOX_RESET_REG:ADC_RESET + localparam ADC_RESET_MSB = 0; //GEARBOX_RESET_REG:ADC_RESET + localparam ADC_RESET = 0; //GEARBOX_RESET_REG:ADC_RESET + localparam DAC_RESET_SIZE = 1; //GEARBOX_RESET_REG:DAC_RESET + localparam DAC_RESET_MSB = 1; //GEARBOX_RESET_REG:DAC_RESET + localparam DAC_RESET = 1; //GEARBOX_RESET_REG:DAC_RESET |