| Commit message (Expand) | Author | Age | Files | Lines |
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| * | reverted zpu stack pointer change, incremented fpga compat number | Josh Blum | 2011-03-17 | 1 | -2/+2 |
| * | u2/u2p: reorganized memory map | Matt Ettus | 2011-03-16 | 1 | -17/+17 |
| * | u2/u2p: fixed instance name | Matt Ettus | 2011-03-16 | 1 | -1/+1 |
| * | u2/u2p: reworked settings bus addresses | Matt Ettus | 2011-03-16 | 1 | -19/+18 |
| * | fix: vita_rx_chain1 should use unit2 (since err0 uses unit1) | Josh Blum | 2011-03-08 | 1 | -1/+1 |
| * | u2/u2p: enlarge dsp rx fifos to handle jumbo frames, enable in u2plus as well | Matt Ettus | 2011-03-05 | 1 | -1/+1 |
| * | u2/u2p: moved dsp framer into vita_rx_chain | Matt Ettus | 2011-03-05 | 1 | -18/+6 |
| * | make big tx fifo the one doing the clock crossing | Matt Ettus | 2011-03-03 | 1 | -11/+3 |
| * | u2/u2p: removed unneeded eth rx fifo | Matt Ettus | 2011-03-03 | 1 | -10/+4 |
| * | u2/u2p: switch over to 36 bit wide ethernet wrapper | Matt Ettus | 2011-03-03 | 1 | -19/+6 |
| * | u2/u2p: packet realignment moved into the simple_gemac_wrapper19 | Matt Ettus | 2011-03-03 | 1 | -9/+1 |
| * | u2/u2p: shrunk ETH TX FIFO, further u2/u2p harmonization | Matt Ettus | 2011-02-21 | 1 | -12/+12 |
| * | increase compat number for double dsp change | Matt Ettus | 2011-02-17 | 1 | -1/+1 |
| * | u2/u2p: reduce unneeded RX DSP buffering | Matt Ettus | 2011-02-17 | 1 | -1/+1 |
| * | u2/u2p: added 2nd DSP unit | Matt Ettus | 2011-02-17 | 1 | -0/+34 |
| * | u2/u2p: renamed and split some rx signals to prepare for 2nd DSP | Matt Ettus | 2011-02-17 | 1 | -25/+22 |
| * | u2/u2p: proper hookup of vita_rx_chain | Matt Ettus | 2011-02-17 | 1 | -5/+5 |
| * | clean up rx dsp and some other nets in prep for dual dsp | Matt Ettus | 2011-02-16 | 1 | -34/+21 |
| * | register map changes to fit in the 2nd rx dsp | Matt Ettus | 2011-02-15 | 1 | -15/+19 |
| * | packet_router: added support for two dsps into router | Josh Blum | 2011-02-15 | 1 | -1/+2 |
| * | Merge branch 'cordic_policy' into next | Josh Blum | 2011-01-04 | 1 | -20/+15 |
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| | * | hook up sampled pps in u2plus, remove unused priority encoder, minor cleanups | Matt Ettus | 2010-12-30 | 1 | -12/+10 |
| | * | processor can read back vita_time at last pps | Matt Ettus | 2010-12-30 | 1 | -10/+4 |
| * | | Merge branch 'udp_ports' into next | Josh Blum | 2010-12-22 | 1 | -1/+2 |
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| | * | | generate port number headers in the dsp error units | Matt Ettus | 2010-12-15 | 1 | -1/+2 |
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| * | | usrp-n210: almost working w/ packet router + zpu | Josh Blum | 2010-12-17 | 1 | -13/+3 |
| * | | zpu: working, modified top level sizes, disable interrupt | Josh Blum | 2010-12-14 | 1 | -7/+4 |
| * | | Merge branch 'packet_router' into zpu | Josh Blum | 2010-12-12 | 1 | -5/+9 |
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| | * | | Merge branch 'ise12' into packet_router | Josh Blum | 2010-12-10 | 1 | -5/+8 |
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| | | * | time sync on usrp2 as well, added debug pins to time sync. | Matt Ettus | 2010-12-10 | 1 | -1/+5 |
| | | * | udp is now the default | Matt Ettus | 2010-12-09 | 1 | -0/+735 |
| | | * | remove old raw ethernet version | Matt Ettus | 2010-12-09 | 1 | -785/+0 |
| | * | | packet_router: renamed top level files in an attempt to merge cleanly | Josh Blum | 2010-12-10 | 1 | -254/+205 |
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| * / | zpu: moved top level file in hopes for easy merge | Josh Blum | 2010-12-12 | 1 | -269/+229 |
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| * | shouldn't be executable | Matt Ettus | 2010-11-20 | 1 | -0/+0 |
| * | Added to DCM's and some BUFG's to align the internal 125MHz clock edge with i... | Ian Buckley | 2010-11-11 | 1 | -1/+1 |
| * | barely fails timing on gigE/10 and gigE/12, larger fail on udp/10, but all | Matt Ettus | 2010-06-14 | 1 | -24/+26 |
| * | first attempt at cleaning up the build system | Matt Ettus | 2010-06-10 | 1 | -2/+1 |
| * | move u2_core into u2_rev3 directory to simplify directory structure and save ... | Matt Ettus | 2010-06-08 | 1 | -0/+784 |
