uhd - Ettus' UHD Repository

	Commit message (Expand)	Author	Age	Files	Lines
*	dsp: do everything at 24 bits wide	Matt Ettus	2011-06-08	1	-45/+27
*	dsp: pass 24 bit wide signals between frontend and dsp core.	Matt Ettus	2011-06-08	1	-6/+6
*	dsp: add guard bit to top of cordic to allow clipping on output instead of wr...	Matt Ettus	2011-06-08	1	-5/+9
*	dsp: reorganized scaling and rounding, removed multipliers (will put back in ...	Matt Ettus	2011-06-08	1	-29/+27
*	dsp: add resets for simulation purposes	Matt Ettus	2011-06-08	1	-4/+4
*	dsp: do proper rounding at the end of dsp chain	Matt Ettus	2011-06-08	1	-1/+1
*	dsp: reworked muxes on rx	Matt Ettus	2011-06-08	1	-2/+22
*	dsp: more typos	Matt Ettus	2011-06-08	1	-2/+2
*	dsp: fix typos	Matt Ettus	2011-06-08	1	-8/+8
*	dsp: add2_and_clip_reg and round_sd now are now strobed to be compatible	Matt Ettus	2011-06-08	1	-9/+11
*	dsp: use sigma delta rounding in rx_dcoffset and in dsp_core_rx	Matt Ettus	2011-06-08	1	-2/+2
*	u2/u2p: misc connection and compilation fixes	Matt Ettus	2011-06-08	1	-10/+11
*	unused nets	Matt Ettus	2011-06-08	1	-1/+0
*	u2/u2p: pull IQ balance and dcoffset out of dsp_core, put in frontend module	Matt Ettus	2011-06-08	1	-41/+2
*	added copyrights	Josh Blum	2011-06-07	1	-0/+17
*	clean up a bunch of warnings and incorrect bus widths	Matt Ettus	2011-03-16	1	-21/+5
*	Clean up iq swapping on RX. It is now swapped in the top level.	Matt Ettus	2010-08-25	1	-22/+13
*	first attempt at cleaning up the build system	Matt Ettus	2010-06-10	1	-8/+8
*	Remove some warnings in dsp_core_rx	Johnathan Corgan	2010-02-23	1	-3/+7
*	Moved usrp2 fpga files into usrp2 subdir.	Josh Blum	2010-01-22	1	-0/+179