dsp: do everything at 24 bits wide

1 files changed, 27 insertions, 45 deletions

diff --git a/usrp2/sdr_lib/dsp_core_rx.v b/usrp2/sdr_lib/dsp_core_rx.v
index e5cb95fd9..639744de7 100644
--- a/usrp2/sdr_lib/dsp_core_rx.v
+++ b/usrp2/sdr_lib/dsp_core_rx.v
@@ -30,18 +30,15 @@ module dsp_core_rx
    output [31:0] debug
    );
 
-   wire [15:0] scale_i, scale_q;
    wire [31:0] phase_inc;
    reg [31:0]  phase;
 
-   wire [35:0] prod_i, prod_q;
    wire [24:0] i_cordic, q_cordic;
    wire [23:0] i_cordic_clip, q_cordic_clip;
    wire [23:0] i_cic, q_cic;
-   wire [17:0] i_cic_scaled, q_cic_scaled;
-   wire [17:0] i_hb1, q_hb1;
-   wire [15:0] i_hb2, q_hb2;
-
+   wire [23:0] i_hb1, q_hb1;
+   wire [23:0] i_hb2, q_hb2;
+   
    wire        strobe_cic, strobe_hb1, strobe_hb2;
    wire        enable_hb1, enable_hb2;
    wire [7:0]  cic_decim_rate;
@@ -54,9 +51,11 @@ module dsp_core_rx
      (.clk(clk),.rst(rst),.strobe(set_stb),.addr(set_addr),
       .in(set_data),.out(phase_inc),.changed());
    
+   /*
    setting_reg #(.my_addr(BASE+1)) sr_1
      (.clk(clk),.rst(rst),.strobe(set_stb),.addr(set_addr),
       .in(set_data),.out({scale_i,scale_q}),.changed());
+   */
    
    setting_reg #(.my_addr(BASE+2), .width(10)) sr_2
      (.clk(clk),.rst(rst),.strobe(set_stb),.addr(set_addr),
@@ -66,6 +65,8 @@ module dsp_core_rx
      (.clk(clk),.rst(rst),.strobe(set_stb),.addr(set_addr),
       .in(set_data),.out({realmode,swap_iq}),.changed());
 
+   // MUX so we can do realmode signals on either input
+   
    always @(posedge clk)
      if(swap_iq)
        begin
@@ -77,7 +78,8 @@ module dsp_core_rx
 	  adc_i_mux <= adc_i;
 	  adc_q_mux <= realmode ? 24'd0 : adc_q;
        end
-   
+
+   // NCO
    always @(posedge clk)
      if(rst)
        phase <= 0;
@@ -86,6 +88,7 @@ module dsp_core_rx
      else
        phase <= phase + phase_inc;
 
+   // CORDIC  24-bit I/O
    cordic_z24 #(.bitwidth(25))
      cordic(.clock(clk), .reset(rst), .enable(run),
 	    .xi({adc_i_mux[23],adc_i_mux}),. yi({adc_q_mux[23],adc_q_mux}), .zi(phase[31:8]),
@@ -93,7 +96,8 @@ module dsp_core_rx
 
    clip_reg #(.bits_in(25), .bits_out(24)) clip_i (.clk(clk), .in(i_cordic), .out(i_cordic_clip));
    clip_reg #(.bits_in(25), .bits_out(24)) clip_q (.clk(clk), .in(q_cordic), .out(q_cordic_clip));
-   
+
+   // CIC decimator  24 bit I/O
    cic_strober cic_strober(.clock(clk),.reset(rst),.enable(run),.rate(cic_decim_rate),
 			   .strobe_fast(1),.strobe_slow(strobe_cic) );
 
@@ -107,54 +111,32 @@ module dsp_core_rx
 	      .rate(cic_decim_rate),.strobe_in(1'b1),.strobe_out(strobe_cic),
 	      .signal_in(q_cordic_clip),.signal_out(q_cic));
 
-   wire        strobe_cic_d1;
-   round_sd #(.WIDTH_IN(24),.WIDTH_OUT(18)) round_icic
-     (.clk(clk),.reset(rst), .in(i_cic), .strobe_in(strobe_cic), .out(i_cic_scaled), .strobe_out(strobe_cic_d1));
-   
-   round_sd #(.WIDTH_IN(24),.WIDTH_OUT(18)) round_qcic
-     (.clk(clk),.reset(rst), .in(q_cic), .strobe_in(strobe_cic), .out(q_cic_scaled), .strobe_out());
-   
-   small_hb_dec #(.WIDTH(18)) small_hb_i
+   // First (small) halfband  24 bit I/O
+   small_hb_dec #(.WIDTH(24)) small_hb_i
      (.clk(clk),.rst(rst),.bypass(~enable_hb1),.run(run),
-      .stb_in(strobe_cic_d1),.data_in(i_cic_scaled),.stb_out(strobe_hb1),.data_out(i_hb1));
+      .stb_in(strobe_cic),.data_in(i_cic),.stb_out(strobe_hb1),.data_out(i_hb1));
    
-   small_hb_dec #(.WIDTH(18)) small_hb_q
+   small_hb_dec #(.WIDTH(24)) small_hb_q
      (.clk(clk),.rst(rst),.bypass(~enable_hb1),.run(run),
-      .stb_in(strobe_cic_d1),.data_in(q_cic_scaled),.stb_out(),.data_out(q_hb1));
+      .stb_in(strobe_cic),.data_in(q_cic),.stb_out(),.data_out(q_hb1));
 
+   // Second (large) halfband  24 bit I/O
    wire [8:0]  cpi_hb = enable_hb1 ? {cic_decim_rate,1'b0} : {1'b0,cic_decim_rate};
-   hb_dec #(.IWIDTH(18), .OWIDTH(16), .CWIDTH(18), .ACCWIDTH(24)) hb_i
+   hb_dec #(.WIDTH(24)) hb_i
      (.clk(clk),.rst(rst),.bypass(~enable_hb2),.run(run),.cpi(cpi_hb),
       .stb_in(strobe_hb1),.data_in(i_hb1),.stb_out(strobe_hb2),.data_out(i_hb2));
 
-   hb_dec #(.IWIDTH(18), .OWIDTH(16), .CWIDTH(18), .ACCWIDTH(24)) hb_q
+   hb_dec #(.WIDTH(24)) hb_q
      (.clk(clk),.rst(rst),.bypass(~enable_hb2),.run(run),.cpi(cpi_hb),
       .stb_in(strobe_hb1),.data_in(q_hb1),.stb_out(),.data_out(q_hb2));
 
-   assign      sample = {i_hb2,q_hb2};
-   assign      strobe = strobe_hb2;
+   // Round final answer to 16 bits
+   round_sd #(.WIDTH_IN(24),.WIDTH_OUT(16)) round_i
+     (.clk(clk),.reset(rst), .in(i_hb2),.strobe_in(strobe_hb2), .out(sample[31:16]), .strobe_out(strobe));
+
+   round_sd #(.WIDTH_IN(24),.WIDTH_OUT(16)) round_q
+     (.clk(clk),.reset(rst), .in(q_hb2),.strobe_in(strobe_hb2), .out(sample[15:0]), .strobe_out());
    
-   assign      debug = {enable_hb1, enable_hb2, run, strobe, strobe_cic, strobe_cic_d1, strobe_hb1, strobe_hb2};
+   assign      debug = {enable_hb1, enable_hb2, run, strobe, strobe_cic, strobe_hb1, strobe_hb2};
    
 endmodule // dsp_core_rx
-
-/*
-   MULT18X18S mult_i
-     (.P(prod_i),    // 36-bit multiplier output
-      .A(adc_i_mux),    // 18-bit multiplier input
-      .B({{2{scale_i[15]}},scale_i}),    // 18-bit multiplier input
-      .C(clk),    // Clock input
-      .CE(1),  // Clock enable input
-      .R(rst)     // Synchronous reset input
-      );
-
-   MULT18X18S mult_q
-     (.P(prod_q),    // 36-bit multiplier output
-      .A(adc_q_mux),    // 18-bit multiplier input
-      .B({{2{scale_q[15]}},scale_q}),    // 18-bit multiplier input
-      .C(clk),    // Clock input
-      .CE(1),  // Clock enable input
-      .R(rst)     // Synchronous reset input
-      ); 
-   
-*/