| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | separate boot ram, redone memory map, connected uart | Matt Ettus | 2010-07-13 | 1 | -2/+2 |
| * | barely fails timing on gigE/10 and gigE/12, larger fail on udp/10, but all | Matt Ettus | 2010-06-14 | 2 | -11/+21 |
| * | added pragmas suggested by Ian Buckley to help ISE12 synthesis | Matt Ettus | 2010-05-18 | 1 | -3/+6 |
| * | get rid of old CVS linkage | Matt Ettus | 2010-05-18 | 33 | -73/+0 |
| * | Moved usrp2 fpga files into usrp2 subdir. | Josh Blum | 2010-01-22 | 54 | -0/+3583 |
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