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* x300: Moved all tick set subscribers to same placeMartin Braun2015-07-291-10/+7
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* cores: Moved subtree populate code to DSP cores (X3x0, E310)Martin Braun2015-07-291-36/+26
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* cores: Moved subtree populate code to frontend coresMartin Braun2015-07-291-20/+8
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* x300: Updated FPGA->ADC Clock delays for all boardsAshish Chaudhari2015-07-241-2/+2
| | | | - Delays changed after ADC config change and FPGA fixes
* x300: Removed radio_rst assertion codeAshish Chaudhari2015-07-233-3/+4
| | | | | | - radio_rst was being asserted to reset the capture iface IDELAYs but that was excessive and had adverse effects on the rest of the radio - Replaced radio_rst with a localized IDELAYCTRL reset
* Revert "x300: Changed ADC clock swing to 1.6V from 0.7V"Ashish Chaudhari2015-07-231-2/+2
| | | | This reverts commit a12b24027fe1af9ca51949f6a9333ac5451690ef.
* x300: Moved system-level ADC and DAC operationsAshish Chaudhari2015-07-233-386/+413
| | | | | | | | | | | - The following function implementations were moved from x300_impl.cpp to x300_adc_dac_utils.cpp - synchronize_dacs - self_test_adcs - extended_adc_test - self_cal_adc_capture_delay - self_cal_adc_xfer_delay - This reduces the size of the x300_impl object file
* x300: Increased the max image size for burnerAshish Chaudhari2015-07-231-1/+1
| | | | - We added additional microcode to configure DCI matching,config rate,etc
* x300: Updated CLK->DATA delay for ADCAshish Chaudhari2015-07-221-2/+2
| | | | | | | | - The value was originally empirically determined based on self-cal results. After the fix for uncalibrated IDELAY, the self-cal offset data was no longer correct. - The new delay through the ADC ensures that the self-cal nominally pick the halfway tap of 16
* x300: Added a comprehensive radio reset sequenceAshish Chaudhari2015-07-224-32/+68
| | | | | | | | | | | - Everytime the LMK is configured, we do the following: - Reset all LMK regs - Wait for LMK lock - Reset radio_clk PLL in FPGA - Wait for FPGA PLL to lock - Assert radio_rst which resets downstream radio logic - This address the intermittent self-cal failures due to uncalibrated IDELAY taps - Bumped FPGA compat to 12
* x300: Minor: Optimized ADC/DAC resetsAshish Chaudhari2015-07-221-11/+11
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* x300: Changed ADC clock swing to 1.6V from 0.7VAshish Chaudhari2015-07-221-2/+2
| | | | - This changed with the ADS62P44 -> ADS62P48 design change
* x300: Addressed code review feedback for Rev7+ supportAshish Chaudhari2015-07-203-118/+126
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* x300: Added extended ADC self-testAshish Chaudhari2015-07-192-9/+68
| | | | | - New device arg "ext_adc_self_test" triggers the test - ext_adc_self_test=<time> runs the test for "time" seconds
* x300: Made all X300 revision related errors fatalAshish Chaudhari2015-07-191-13/+20
| | | | | - product code, revision and revision compat errors are now exceptions - Added recover_mb_eeprom arg to recover from a corrupt/uninitialized EEPROM
* x300: Added HW rev compat number supportAshish Chaudhari2015-07-182-12/+27
| | | | | - Added new field "revision_compat" to mb_eeprom - Enforce a revision_compat of 7
* x300: Added new Rev7+ X3x0 MB product codesAshish Chaudhari2015-07-182-2/+54
| | | | | - Added new PCIe and MB PIDs for new boards - Added an error if MB PID is invalid
* x300: Bumped max HW rev to 8Martin Braun2015-07-161-1/+1
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* Added uhd::image_loader class and uhd_image_loader utilityNicholas Corgan2015-07-156-8/+538
| | | | | | * Single class for loading firmware/FPGA images onto devices instead of multiple utilities * Loading functions are registered for each device, corresponding to their --args="type=foo" name * Deprecation warnings added to all product-specific image loading utilities
* Merge branch 'maint'Martin Braun2015-07-141-1/+0
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| * x300: Removed stray debug printMartin Braun2015-07-141-1/+0
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* | Updated compat numbers for B2x0 and X3x0Martin Braun2015-07-141-1/+1
| | | | | | | | | | - B2x0: FW compat number (goes with previous firmware update) - X3x0: Max HW rev number
* | Merge branch 'maint'Martin Braun2015-07-142-0/+11
|\| | | | | | | | | | | | | | | | | | | Conflicts: fpga-src host/CMakeLists.txt host/cmake/Modules/UHDVersion.cmake host/lib/usrp/b200/b200_impl.hpp host/lib/usrp/e300/e300_fpga_defs.hpp host/lib/usrp/x300/x300_fw_common.h
| * x300: Added max hw rev checkingMartin Braun2015-07-142-0/+11
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* | x300: Added retry mechanism to ADC capture delay self-calAshish Chaudhari2015-07-141-47/+65
| | | | | | | | | | - If the self-cal fails, UHD waits for 2 sec for the ADC temp to stabilize and retries the self-cal
* | x300: Updated pre-rev7 board delays after characterizationAshish Chaudhari2015-07-141-3/+2
| | | | | | | | - Characterized over process and temperature
* | x300: Fixed Windows build issue in x300_clock_ctrlAshish Chaudhari2015-07-091-3/+4
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* | x300: Added FPGA->ADC Clock delay for rev 7+ boardsAshish Chaudhari2015-07-071-1/+1
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* | x300: Bumped FPGA compat number to 11Ashish Chaudhari2015-07-071-1/+1
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* | x300: Added self-cal to tune ADC source-sync data delaysAshish Chaudhari2015-07-073-50/+160
| | | | | | | | | | | | | | - Self-calibration routine steps through various values of IDELAY taps on the SS data bits to detect metastability in the capture interface and computes an ideal delay tap value - Self calibration is triggered at device creation
* | x300: Added self-cal to tune ADC clk delay at startupAshish Chaudhari2015-07-013-33/+239
| | | | | | | | | | | | | | | | - Self-calibration routine steps through various values of LMK delay to detect metastability in the SSCLK -> radio_clk crossing and computes an ideal delay for the ADC clock. - Self calibration is triggered at startup if the self_cal_adc_delay device arg is specified
* | x300: Added set/get_clock_delay to x300_clock_ctrlAshish Chaudhari2015-07-012-17/+244
| | | | | | | | | | | | | | - This function allows delaying divider pairs using the digital and analog delay blocks in the LMK divider - ctrl object caches delay for later retrieval - Minor fixes to LMK regmap
* | Merge branch 'maint'Martin Braun2015-06-091-16/+28
|\| | | | | | | | | | | | | Conflicts: host/lib/usrp/common/ad9361_ctrl.hpp host/lib/usrp/common/ad9361_driver/ad9361_device.h host/lib/usrp/e300/e300_remote_codec_ctrl.hpp
| * x300: Updated clock rate / ref freq warnings for clarityMartin Braun2015-05-221-16/+28
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* | x300: Check FPGA compat before firmware compatAshish Chaudhari2015-04-211-2/+3
| | | | | | | | - The firmware is a subset of the FPGA so this order makes sense
* | Merge branch 'master' into vivadoAshish Chaudhari2015-04-214-340/+472
|\ \ | | | | | | | | | | | | Conflicts: host/lib/usrp/x300/x300_clock_ctrl.cpp
| * | Merge branch 'maint'Martin Braun2015-04-104-335/+467
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| | * Increase command FIFO depth of N2x0 and X3x0 to 64.michael-west2015-04-101-2/+2
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| | * X300: Change dboard clock rate to 50 MHzmichael-west2015-04-103-333/+465
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* | | Merge branch 'master' into vivadoAshish Chaudhari2015-04-094-2/+17
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| * | Merge branch 'maint'Martin Braun2015-04-063-1/+16
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| | * uhd: Add ability to get and set command time through dboard_iface.michael-west2015-04-033-2/+17
| | | | | | | | | | | | | | | This creates a wb_iface child class called timed_wb_iface, which adds support for timed commands.
| * | Merge branch 'maint'Martin Braun2015-03-311-1/+1
| |\| | | | | | | | | | | | | Conflicts: host/docs/usrp_e3x0.dox
| | * x300: Fix for Bug #714: Phase wobble across four channels on two devicesNeel Pandeya2015-03-301-1/+1
| | | | | | | | | | | | - Increased filter loop bandwith on clock control chip
* | | Merge branch 'master' into ashish/vivadoAshish Chaudhari2015-03-301-2/+2
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| * | Merge branch 'maint'Martin Braun2015-03-271-2/+2
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| | * Warning fixesNicholas Corgan2015-03-271-2/+2
| | | | | | | | | | | | | | | | | | | | | * CMake now not applying C++ flags to C files * GCC 4.4: anti-aliasing rules * MSVC: narrowing, differences in subclass function parameters * Clang: uninitialized variables
* | | Merge branch 'master' into ashish/vivadoAshish Chaudhari2015-03-174-148/+135
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| * | gpio: Renamed enums to avoid clash with generic, compiler-provided namesMartin Braun2015-03-111-7/+7
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| * | B200: UHD support for FPGPIO connector on REV6+ boards.Ian Buckley2015-03-092-19/+22
| | | | | | | | | | | | | | | | | | - GPIO on UART connector all board Revs - Consolidated fpgpio_bitbang into fpgpio example and renamed it gpio - Changed FP_GPIO readback address to match X300
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