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path: root/host/lib/usrp/x300/x300_impl.hpp
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* E300/X300: Add VITA time synchronization on internal signalmichael-west2015-12-101-0/+1
* cores: Corrected scaling_adjustment calculationIan Buckley2015-09-031-0/+2
* x300: Used new soft register API for X300 registersAshish Chaudhari2015-08-041-45/+7
* x300: Added a comprehensive radio reset sequenceAshish Chaudhari2015-07-221-2/+1
* x300: Added extended ADC self-testAshish Chaudhari2015-07-191-0/+2
* Added uhd::image_loader class and uhd_image_loader utilityNicholas Corgan2015-07-151-1/+3
* x300: Added self-cal to tune ADC source-sync data delaysAshish Chaudhari2015-07-071-8/+17
* x300: Added self-cal to tune ADC clk delay at startupAshish Chaudhari2015-07-011-1/+36
* Merge branch 'maint'Martin Braun2015-04-101-2/+2
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| * Increase command FIFO depth of N2x0 and X3x0 to 64.michael-west2015-04-101-2/+2
* | Merge branch 'maint'Martin Braun2015-04-061-0/+1
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| * uhd: Add ability to get and set command time through dboard_iface.michael-west2015-04-031-0/+1
| * x300: Cleaned up DAC ctrl and clock init logicAshish Chaudhari2014-11-061-2/+10
* | B200: UHD support for FPGPIO connector on REV6+ boards.Ian Buckley2015-03-091-3/+3
* | x300: Cleaned up DAC ctrl and clock init logicAshish Chaudhari2014-11-131-2/+10
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* x300,nirio: Added support for NI-RIO 14.0Ashish Chaudhari2014-10-101-1/+1
* x300: Reduced the TX buffer from 576K to 520KAshish Chaudhari2014-10-091-1/+1
* Merge branch 'maint'Martin Braun2014-09-251-0/+2
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| * x300: added reset and resync of ADCs and DACs when changing reference clockmichael-west2014-09-251-0/+2
* | Give user the option to ignore daughterboard's calibration file at runtimeNicholas Corgan2014-09-021-0/+1
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* tx fe corrections: fixing mixed tabs / spaces, other horrible whitespace cruftBen Hilburn2014-07-251-1/+1
* X300: Added UHD support for TX FEIan Buckley2014-07-181-0/+2
* x300: Bugfix for overflows on PCIe at 200MS/sAshish Chaudhari2014-06-271-1/+5
* Lots of bit-specific type work to fix compilation on older OSes.Ben Hilburn2014-05-211-2/+2
* x300: Changed bus_clk frequency to 166.67MHz.Ashish Chaudhari2014-04-281-1/+1
* x300: Added synchronization between device claiming and checking.Ashish Chaudhari2014-04-241-0/+1
* x300: Added max link rate infoMartin Braun2014-04-101-0/+4
* x300: Fix the assumed max header sizeMartin Braun2014-03-281-0/+9
* Modified reference clock lock check to only be performed on Rev E or later.michael-west2014-03-171-0/+2
* Merge clock and PPS fixes.Ben Hilburn2014-03-151-5/+7
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| * Addressed comments from review.michael-west2014-03-151-5/+6
| * - Fix for BUG #264: ./test_pps_input --source external passes even with no 1 ...Michael West2014-02-181-0/+1
* | Merge Ethernet, MTU, and frame size fixes.Ben Hilburn2014-03-141-1/+1
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| * | x300 mtu: Removed magic number, minor manual updatesMartin Braun2014-02-181-1/+1
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* | x300: added channel mapping capabilitiesMartin Braun2014-03-101-5/+25
* | x300: merged subdev update routines for tx and rxMartin Braun2014-03-101-2/+7
* | x300: remove data that was duplicating property treeMartin Braun2014-03-101-4/+0
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* Pushing the bulk of UHD-3.7.0 code.Ben Hilburn2014-02-141-20/+31
* Merging USRP X300 and X310 support!!Ben Hilburn2014-02-041-0/+306
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