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* Fix for BUG #517: B200: Regression of power level on RXmichael-west2014-07-221-1/+1
| | | | - Fixed scalar for RX DSP core
* Fix for BUG #527: N200: 50 Msps results in two tonesmichael-west2014-07-011-1/+2
| | | | - Adjusted check to enable first half-band filter only if the rate is decimated enough between the CIC and other half-band filter
* - Changed XOR to OR for REG_DSP_RX_MUX flags.michael-west2014-06-121-3/+3
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* Fix for BUG #500: B210: RX channels are not phase alignedmichael-west2014-06-062-3/+8
| | | | - Adding UHD side code to invert second RX channel
* b200: reverted decim mask for scaling factor, and instead conditionally add ↵Balint Seeber2014-03-311-3/+5
| | | | new X3x0 host rates (get_host_rates) with '_is_b200'
* b200: RX DSP scaling mask is 1 bit too narrow for decim 256Balint Seeber2014-03-311-1/+1
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* b200: Fixed bug in rx_dsp_core_3000 that would assume 3 halfbands and X300 ↵Ashish Chaudhari2014-02-192-29/+43
| | | | settings interface.
* Merging USRP X300 and X310 support!!Ben Hilburn2014-02-043-21/+36
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* Squashed merge of Coverity fixes.Ben Hilburn2013-11-276-3/+16
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* stall-bug: generalized message size handlingJohannes Demel2013-11-201-2/+1
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* stall-bug: fixed call by value instead of call by referenceJohannes Demel2013-11-201-8/+16
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* b200/dtor-stall: final fixes for stall bugJohannes Demel2013-11-191-2/+2
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* b200/dtor-stall: fixed bug that stalled b200 on shutdown.Johannes Demel2013-11-192-47/+79
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* uhd: wb_iface is now a public interfaceJosh Blum2013-10-0424-164/+43
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* b200: integrate support for new convertersJosh Blum2013-09-042-11/+21
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* vita: switch modules to CHDR byte formatJosh Blum2013-09-042-8/+8
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* b200: changed for pps select registerJosh Blum2013-08-132-27/+3
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* uhd: allow for 16 bit i2c and eeprom addrsJosh Blum2013-07-243-6/+14
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* uhd: remove warning on stream cmd to unused channelsJosh Blum2013-07-191-1/+1
| | | | | | Basically, many apps issue stream cmds by broadcasting the cmd to all channels. This warning is going to appear many times for most apps becasue of this. Since nothing is really harmed, its nicer to not see it and confuse users.
* uhd: squashed support modules for usrp3 fpga coresJosh Blum2013-07-1921-7/+1880
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* Merge branch 'maint'Josh Blum2012-10-052-4/+6
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| * usrp: ensure that actual_scalar does not rolloverJosh Blum2012-10-052-4/+6
| | | | | | | | | | | | For certain decimations/interpolations, the scale factor adjustment may be greater than 1.0. The > 1.0 factor needs to be adjusted out in the host.
* | usrp: added CIC warning to DSP rx and txJosh Blum2012-09-282-0/+18
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* | Merge branch 'maint'Josh Blum2012-09-111-1/+1
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| * usrp: fix rx dsp core scaling factor off by 2Josh Blum2012-09-111-1/+1
| | | | | | | | The scale factor is a 18 bit number, this should be 1 << 17
* | usrp: cache writes to gpio pins (avoids overhead)Josh Blum2012-07-061-1/+7
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* | usrp: clear rx dsp on deconstructionJosh Blum2012-06-051-0/+10
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* | usrp: added control for sr based i2c coreJosh Blum2012-05-303-0/+194
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* | gpsdo: added "gpsdo" clock and time source optionsJosh Blum2012-05-182-2/+8
| | | | | | | | When an on-board GPSDO is detected, "gpsdo" is added to the options.
* | usrp: updated nchan usage for vita rx changeJosh Blum2012-04-101-1/+1
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* dsp: clear register now overlaps with numchan register.Josh Blum2012-04-091-4/+2
| | | | This fixes the bug of unwanted clearing when setting format.
* usrp: fix for rx_frontend_core_200 dc offsetJosh Blum2012-03-231-3/+4
| | | | | Mask off upper bits when setting a constant offset (I and Q regs). The sign bits (if negative) can flow off into the flags field.
* uhd: rev iq correction numbers formatJosh Blum2012-03-142-4/+4
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* uhd: added fullscale option stream argJosh Blum2012-03-112-0/+4
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* dsp rework: added flusher to vita tx chain on clearJosh Blum2012-02-152-5/+8
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* uhd: various tweaks for compiler warns and valgrindJosh Blum2012-02-091-1/+1
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* dsp rework: implement 64 bit ticks, no secondsJosh Blum2012-02-063-23/+25
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* dsp rework: move setting address of format registerJosh Blum2012-02-022-6/+4
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* dsp rework: tx trailer, scaling work (peak)Josh Blum2012-01-312-13/+29
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* gen2: added user setting regs api and user coreJosh Blum2012-01-313-1/+81
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* dsp rework: work on scaling and args parsing on RX and TX dspJosh Blum2012-01-314-11/+48
| | | | | This simplified some copy pasta in the io_impl.cpp files, and adds a place for sc8 tx mode in the tx dsp core code.
* dsp rework: implemented new scalefactor in rx dsp coreJosh Blum2012-01-312-12/+25
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* uhd: flush transport for new rx streamersJosh Blum2012-01-231-0/+2
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* usrp: compensate for other sc8 conversion gainJosh Blum2012-01-091-1/+3
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* usrp: added underflow_policy to tx streamer argsJosh Blum2011-12-202-1/+13
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* usrp: rx dsp move init code into clear (like tx)Josh Blum2011-12-051-6/+7
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* uhd: work with stream clearingJosh Blum2011-12-052-6/+6
| | | | | | | | dont clear when using the compat device API tx clear also resets expected seqnum tx clear on usrp2 resets flow control monitor
* usrp: clear dsp when making new streamerJosh Blum2011-11-214-0/+13
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* uhd: basically usable cal sweep for wbxJosh Blum2011-11-102-4/+4
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* usrp2: reg map change for GPIO coreJosh Blum2011-11-032-7/+7
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