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author | Josh Blum <josh@joshknows.com> | 2011-10-26 19:31:35 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2011-11-03 21:00:07 -0700 |
commit | 69adaee902c5f409ebd7844667a0c253d7a06c6a (patch) | |
tree | f0d8a7d8ca940ecc0196063136e737888bf28fbe /host/lib/usrp/cores | |
parent | 07fb8d2b82c59ddaf7722b12db8c1387011fb34b (diff) | |
download | uhd-69adaee902c5f409ebd7844667a0c253d7a06c6a.tar.gz uhd-69adaee902c5f409ebd7844667a0c253d7a06c6a.tar.bz2 uhd-69adaee902c5f409ebd7844667a0c253d7a06c6a.zip |
usrp2: reg map change for GPIO core
Diffstat (limited to 'host/lib/usrp/cores')
-rw-r--r-- | host/lib/usrp/cores/gpio_core_200.cpp | 12 | ||||
-rw-r--r-- | host/lib/usrp/cores/gpio_core_200.hpp | 2 |
2 files changed, 7 insertions, 7 deletions
diff --git a/host/lib/usrp/cores/gpio_core_200.cpp b/host/lib/usrp/cores/gpio_core_200.cpp index 8639b1851..d756097ff 100644 --- a/host/lib/usrp/cores/gpio_core_200.cpp +++ b/host/lib/usrp/cores/gpio_core_200.cpp @@ -23,15 +23,14 @@ #define REG_GPIO_TX_ONLY _base + 8 #define REG_GPIO_BOTH _base + 12 #define REG_GPIO_DDR _base + 16 -#define REG_GPIO_READ _base + 0 //any address will readback using namespace uhd; using namespace usrp; class gpio_core_200_impl : public gpio_core_200{ public: - gpio_core_200_impl(wb_iface::sptr iface, const size_t base): - _iface(iface), _base(base) { /* NOP */ } + gpio_core_200_impl(wb_iface::sptr iface, const size_t base, const size_t rb_addr): + _iface(iface), _base(base), _rb_addr(rb_addr) { /* NOP */ } void set_pin_ctrl(const unit_t unit, const boost::uint16_t value){ _pin_ctrl[unit] = value; //shadow @@ -57,12 +56,13 @@ public: } boost::uint16_t read_gpio(const unit_t unit){ - return boost::uint16_t(_iface->peek32(REG_GPIO_READ) >> unit2shit(unit)); + return boost::uint16_t(_iface->peek32(_rb_addr) >> unit2shit(unit)); } private: wb_iface::sptr _iface; const size_t _base; + const size_t _rb_addr; uhd::dict<unit_t, boost::uint16_t> _pin_ctrl, _gpio_out, _gpio_ddr; uhd::dict<unit_t, uhd::dict<atr_reg_t, boost::uint16_t> > _atr_regs; @@ -95,6 +95,6 @@ private: }; -gpio_core_200::sptr gpio_core_200::make(wb_iface::sptr iface, const size_t base){ - return sptr(new gpio_core_200_impl(iface, base)); +gpio_core_200::sptr gpio_core_200::make(wb_iface::sptr iface, const size_t base, const size_t rb_addr){ + return sptr(new gpio_core_200_impl(iface, base, rb_addr)); } diff --git a/host/lib/usrp/cores/gpio_core_200.hpp b/host/lib/usrp/cores/gpio_core_200.hpp index 7ff2af649..278575874 100644 --- a/host/lib/usrp/cores/gpio_core_200.hpp +++ b/host/lib/usrp/cores/gpio_core_200.hpp @@ -33,7 +33,7 @@ public: typedef uhd::usrp::dboard_iface::atr_reg_t atr_reg_t; //! makes a new GPIO core from iface and slave base - static sptr make(wb_iface::sptr iface, const size_t base); + static sptr make(wb_iface::sptr iface, const size_t base, const size_t rb_addr); //! 1 = ATR virtual void set_pin_ctrl(const unit_t unit, const boost::uint16_t value) = 0; |