| Commit message (Collapse) | Author | Age | Files | Lines |
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Reviewed-by: Trung Tran <trung.tran@ettus.com>
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1/ multi_usrp.hpp; multi_usrp.cpp: added new functions
- set_gpio_attr() that allow user to set certain attribute by string
value.
- get_gpio_string_attr() return string type value of certain attribute.
2/ gpio_defs.hpp; gpio_atr_3000.cpp : added new definition of SRC attribute.
This commit enable user to use multi_usrp api to set_gpio_attr using string
value. This is helpful; because the attribute can represent more than two state
as of old API. This enable user to set SRC (source) that drive each GPIO bank's
pin. Source can be either processing unit(PS) or radio frontend logic from FPGA
logic.
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All copyright is now attributed to "Ettus Research, a National
Instruments company".
SPDX headers were also updated to latest version 3.0.
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- Removed stale files (i2c_core_100, spi_core_100)
- Made more compilation condiational; disabling some devices will
disable dependencies as well so they don't get compiled in by default.
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types)
- Also removes all references to boost/cstdint.hpp and replaces it with
stdint.h (The 'correct' replacement would be <cstdint>, but not all of our
compilers support that).
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Conflicts:
host/lib/usrp/cores/gpio_core_200.cpp
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- rx_dsp_core: set_mux takes in a fe_connection obj
to determine IQ mapping and sampling mode parameters
- rx_dsp_core: Support a non-zero IF for downconversion
The current strategy applies a software DSP freq offset
which eats into the range of the CORDIC which is OK
because heterodyne assumes real-mode sampling
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* Removed code referencing now-unsupported versions of Boost
* Added <stdint.h> includes where needed
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Conflicts:
host/lib/usrp/cores/gpio_core_200.cpp
host/lib/usrp/dboard/db_ubx.cpp
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- Disabled MAX2871 VCO auto selection for phase sync
- Added checks for new phase sync constraints recently published by Maxim
- Added dboard_clock_rate option for X300
- Adjusted timing of SYNC signal relative to dboard referenc clock
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- Made dboard_iface an interface! Removed PIMPL
- Added unit "BOTH" to dboard API and expanded GPIO API width to 32
- Removed gpio_debug_mux. No product ever used that
- Refactored gpio_atr cores to work with new dboard_iface
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- Added desired and coerced values and accessors to property
- Added support to register desired subscribers
- set APIs don't reallocate storage for a property value
- Renamed callback method registration APIs
- Registering 2 coercers or publishers for a property will throw
- Registering a coercer and a publisher for the same property will throw
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Conflicts:
host/lib/usrp/b200/b200_impl.hpp
host/lib/usrp/e300/e300_fpga_defs.hpp
host/lib/usrp/x300/x300_fw_common.h
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Compensate for headroom required to rotate a signal in
the CORDIC. Fixes some CORDIC-related clipping issues,
that reduced ENOB to 15 or 14.5 bits.
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- Masking with ATR Disabled deferred to flush
- Some dboards like to switch between GPIO and ATR mode
and still expect state to be maintained
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Conflicts:
host/lib/usrp/cores/CMakeLists.txt
host/lib/usrp/x300/x300_impl.hpp
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- gpio_atr_3000 will not blindly use the mask when writing
the ATR and GPIO OUT values. The mask will be ANDed with
the value in the ATR Disable register
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- Removed implicit type converstions in ATR address passing
- Changed magic numbers to named constants
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- Refactored GPIO ATR definitions
- Added new 3000 core with a more efficient API
- Added a separate db_gpio_atr core to control the ATR bus
- Ported b2xx, e3xx and x3xx to the new core
- Minor cleanup
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- Can access all registers in axi_dma_fifo.v
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- tx_vita_core_3000 can now monitor for flow-control immediately
before the radio or immediately before the radio external FIFO
- B200 does not have an external FIFO so it will use the default config
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Compensate for headroom required to rotate a signal in
the CORDIC. Fixes some CORDIC-related clipping issues,
that reduced ENOB to 15 or 14.5 bits.
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This creates a wb_iface child class called timed_wb_iface, which
adds support for timed commands.
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