Remove all boost:: namespace prefix for uint32_t, int32_t etc. (fixed-width types)

- Also removes all references to boost/cstdint.hpp and replaces it with
  stdint.h (The 'correct' replacement would be <cstdint>, but not all of our
  compilers support that).

29 files changed, 277 insertions, 277 deletions

diff --git a/host/lib/usrp/cores/dma_fifo_core_3000.cpp b/host/lib/usrp/cores/dma_fifo_core_3000.cpp
index 5df28f7c2..908ba906e 100644
--- a/host/lib/usrp/cores/dma_fifo_core_3000.cpp
+++ b/host/lib/usrp/cores/dma_fifo_core_3000.cpp
@@ -36,12 +36,12 @@ protected:
     public:
         UHD_DEFINE_SOFT_REG_FIELD(ADDR, /*width*/ 3, /*shift*/ 0);  //[2:0]
 
-        static const boost::uint32_t RB_FIFO_STATUS     = 0;
-        static const boost::uint32_t RB_BIST_STATUS     = 1;
-        static const boost::uint32_t RB_BIST_XFER_CNT   = 2;
-        static const boost::uint32_t RB_BIST_CYC_CNT    = 3;
+        static const uint32_t RB_FIFO_STATUS     = 0;
+        static const uint32_t RB_BIST_STATUS     = 1;
+        static const uint32_t RB_BIST_XFER_CNT   = 2;
+        static const uint32_t RB_BIST_CYC_CNT    = 3;
 
-        rb_addr_reg_t(boost::uint32_t base):
+        rb_addr_reg_t(uint32_t base):
             soft_reg32_wo_t(base + 0)
         {
             //Initial values
@@ -56,7 +56,7 @@ protected:
         UHD_DEFINE_SOFT_REG_FIELD(BURST_TIMEOUT,        /*width*/ 12, /*shift*/  4);  //[15:4]
         UHD_DEFINE_SOFT_REG_FIELD(RD_SUPPRESS_THRESH,   /*width*/ 16, /*shift*/ 16);  //[31:16]
 
-        fifo_ctrl_reg_t(boost::uint32_t base):
+        fifo_ctrl_reg_t(uint32_t base):
             soft_reg32_wo_t(base + 4)
         {
             //Initial values
@@ -71,7 +71,7 @@ protected:
     public:
         UHD_DEFINE_SOFT_REG_FIELD(BASE_ADDR, /*width*/ 30, /*shift*/ 0);  //[29:0]
 
-        base_addr_reg_t(boost::uint32_t base):
+        base_addr_reg_t(uint32_t base):
             soft_reg32_wo_t(base + 8)
         {
             //Initial values
@@ -83,7 +83,7 @@ protected:
     public:
         UHD_DEFINE_SOFT_REG_FIELD(ADDR_MASK, /*width*/ 30, /*shift*/ 0);  //[29:0]
 
-        addr_mask_reg_t(boost::uint32_t base):
+        addr_mask_reg_t(uint32_t base):
             soft_reg32_wo_t(base + 12)
         {
             //Initial values
@@ -97,12 +97,12 @@ protected:
         UHD_DEFINE_SOFT_REG_FIELD(CONTINUOUS_MODE,  /*width*/ 1, /*shift*/ 1);  //[1]
         UHD_DEFINE_SOFT_REG_FIELD(TEST_PATT,        /*width*/ 2, /*shift*/ 4);  //[5:4]
 
-        static const boost::uint32_t TEST_PATT_ZERO_ONE     = 0;
-        static const boost::uint32_t TEST_PATT_CHECKERBOARD = 1;
-        static const boost::uint32_t TEST_PATT_COUNT        = 2;
-        static const boost::uint32_t TEST_PATT_COUNT_INV    = 3;
+        static const uint32_t TEST_PATT_ZERO_ONE     = 0;
+        static const uint32_t TEST_PATT_CHECKERBOARD = 1;
+        static const uint32_t TEST_PATT_COUNT        = 2;
+        static const uint32_t TEST_PATT_COUNT_INV    = 3;
 
-        bist_ctrl_reg_t(boost::uint32_t base):
+        bist_ctrl_reg_t(uint32_t base):
             soft_reg32_wo_t(base + 16)
         {
             //Initial values
@@ -118,7 +118,7 @@ protected:
         UHD_DEFINE_SOFT_REG_FIELD(MAX_PKT_SIZE,     /*width*/ 13, /*shift*/ 18); //[30:18]
         UHD_DEFINE_SOFT_REG_FIELD(PKT_SIZE_RAMP,    /*width*/ 1,  /*shift*/ 31); //[31]
 
-        bist_cfg_reg_t(boost::uint32_t base):
+        bist_cfg_reg_t(uint32_t base):
             soft_reg32_wo_t(base + 20)
         {
             //Initial values
@@ -133,7 +133,7 @@ protected:
         UHD_DEFINE_SOFT_REG_FIELD(TX_PKT_DELAY,     /*width*/ 16, /*shift*/ 0);  //[15:0]
         UHD_DEFINE_SOFT_REG_FIELD(RX_SAMP_DELAY,    /*width*/  8, /*shift*/ 16); //[23:16]
 
-        bist_delay_reg_t(boost::uint32_t base):
+        bist_delay_reg_t(uint32_t base):
             soft_reg32_wo_t(base + 24)
         {
             //Initial values
@@ -146,7 +146,7 @@ protected:
     public:
         UHD_DEFINE_SOFT_REG_FIELD(SID,     /*width*/ 32, /*shift*/ 0);  //[31:0]
 
-        bist_sid_reg_t(boost::uint32_t base):
+        bist_sid_reg_t(uint32_t base):
             soft_reg32_wo_t(base + 28)
         {
             //Initial values
@@ -169,13 +169,13 @@ public:
             return _iface->peek32(_rb_addr) & 0x80000000;
         }
 
-        boost::uint32_t get_occupied_cnt() {
+        uint32_t get_occupied_cnt() {
             boost::lock_guard<boost::mutex> lock(_mutex);
             _addr_reg.write(rb_addr_reg_t::ADDR, rb_addr_reg_t::RB_FIFO_STATUS);
             return _iface->peek32(_rb_addr) & 0x7FFFFFF;
         }
 
-        boost::uint32_t is_fifo_busy() {
+        uint32_t is_fifo_busy() {
             boost::lock_guard<boost::mutex> lock(_mutex);
             _addr_reg.write(rb_addr_reg_t::ADDR, rb_addr_reg_t::RB_FIFO_STATUS);
             return _iface->peek32(_rb_addr) & 0x40000000;
@@ -184,17 +184,17 @@ public:
         struct bist_status_t {
             bool running;
             bool finished;
-            boost::uint8_t error;
+            uint8_t error;
         };
 
         bist_status_t get_bist_status() {
             boost::lock_guard<boost::mutex> lock(_mutex);
             _addr_reg.write(rb_addr_reg_t::ADDR, rb_addr_reg_t::RB_BIST_STATUS);
-            boost::uint32_t st32 = _iface->peek32(_rb_addr) & 0xF;
+            uint32_t st32 = _iface->peek32(_rb_addr) & 0xF;
             bist_status_t status;
             status.running = st32 & 0x1;
             status.finished = st32 & 0x2;
-            status.error = static_cast<boost::uint8_t>((st32>>2) & 0x3);
+            status.error = static_cast<uint8_t>((st32>>2) & 0x3);
             return status;
         }
 
@@ -206,7 +206,7 @@ public:
 
         double get_xfer_ratio() {
             boost::lock_guard<boost::mutex> lock(_mutex);
-            boost::uint32_t xfer_cnt = 0, cyc_cnt = 0;
+            uint32_t xfer_cnt = 0, cyc_cnt = 0;
             _addr_reg.write(rb_addr_reg_t::ADDR, rb_addr_reg_t::RB_BIST_XFER_CNT);
             xfer_cnt = _iface->peek32(_rb_addr);
             _addr_reg.write(rb_addr_reg_t::ADDR, rb_addr_reg_t::RB_BIST_CYC_CNT);
@@ -252,10 +252,10 @@ public:
         _fifo_ctrl_reg.write(fifo_ctrl_reg_t::CLEAR_FIFO, 0);
     }
 
-    virtual void resize(const boost::uint32_t base_addr, const boost::uint32_t size) {
+    virtual void resize(const uint32_t base_addr, const uint32_t size) {
         //Validate parameters
         if (size < 8192) throw uhd::runtime_error("DMA FIFO must be larger than 8KiB");
-        boost::uint32_t size_mask = size - 1;
+        uint32_t size_mask = size - 1;
         if (size & size_mask) throw uhd::runtime_error("DMA FIFO size must be a power of 2");
 
         //Clear the FIFO and hold it in that state
@@ -268,7 +268,7 @@ public:
         flush();
     }
 
-    virtual boost::uint32_t get_bytes_occupied() {
+    virtual uint32_t get_bytes_occupied() {
         return _fifo_readback.get_occupied_cnt() * 8;
     }
 
@@ -276,16 +276,16 @@ public:
         return _fifo_readback.is_ext_bist_supported();
     }
 
-    virtual boost::uint8_t run_bist(bool finite = true, boost::uint32_t timeout_ms = 500) {
+    virtual uint8_t run_bist(bool finite = true, uint32_t timeout_ms = 500) {
         return run_ext_bist(finite, 0, 0, 0, timeout_ms);
     }
 
-    virtual boost::uint8_t run_ext_bist(
+    virtual uint8_t run_ext_bist(
         bool finite,
-        boost::uint32_t rx_samp_delay,
-        boost::uint32_t tx_pkt_delay,
-        boost::uint32_t sid,
-        boost::uint32_t timeout_ms = 500
+        uint32_t rx_samp_delay,
+        uint32_t tx_pkt_delay,
+        uint32_t sid,
+        uint32_t timeout_ms = 500
     ) {
         boost::lock_guard<boost::mutex> lock(_mutex);
 
@@ -350,7 +350,7 @@ private:
         }
     }
 
-    void _wait_for_bist_done(boost::uint32_t timeout_ms, bool force_stop = false)
+    void _wait_for_bist_done(uint32_t timeout_ms, bool force_stop = false)
     {
         boost::posix_time::ptime start_time = boost::posix_time::microsec_clock::local_time();
         boost::posix_time::time_duration elapsed;
diff --git a/host/lib/usrp/cores/dma_fifo_core_3000.hpp b/host/lib/usrp/cores/dma_fifo_core_3000.hpp
index 41430e5c3..46a913c93 100644
--- a/host/lib/usrp/cores/dma_fifo_core_3000.hpp
+++ b/host/lib/usrp/cores/dma_fifo_core_3000.hpp
@@ -49,17 +49,17 @@ public:
     /*!
      * Resize and rebase the DMA FIFO. Will clear all contents.
      */
-    virtual void resize(const boost::uint32_t base_addr, const boost::uint32_t size) = 0;
+    virtual void resize(const uint32_t base_addr, const uint32_t size) = 0;
 
     /*!
      * Get the (approx) number of bytes currently in the DMA FIFO
      */
-    virtual boost::uint32_t get_bytes_occupied() = 0;
+    virtual uint32_t get_bytes_occupied() = 0;
 
     /*!
      * Run the built-in-self-test routine for the DMA FIFO
      */
-    virtual boost::uint8_t run_bist(bool finite = true, boost::uint32_t timeout_ms = 500) = 0;
+    virtual uint8_t run_bist(bool finite = true, uint32_t timeout_ms = 500) = 0;
 
     /*!
      * Is extended BIST supported
@@ -69,12 +69,12 @@ public:
     /*!
      * Run the built-in-self-test routine for the DMA FIFO (extended BIST only)
      */
-    virtual boost::uint8_t run_ext_bist(
+    virtual uint8_t run_ext_bist(
         bool finite,
-        boost::uint32_t rx_samp_delay,
-        boost::uint32_t tx_pkt_delay,
-        boost::uint32_t sid,
-        boost::uint32_t timeout_ms = 500) = 0;
+        uint32_t rx_samp_delay,
+        uint32_t tx_pkt_delay,
+        uint32_t sid,
+        uint32_t timeout_ms = 500) = 0;
 
     /*!
      * Get the throughput measured from the last invocation of the BIST (extended BIST only)
diff --git a/host/lib/usrp/cores/dsp_core_utils.cpp b/host/lib/usrp/cores/dsp_core_utils.cpp
index aea809ae8..cf022f767 100644
--- a/host/lib/usrp/cores/dsp_core_utils.cpp
+++ b/host/lib/usrp/cores/dsp_core_utils.cpp
@@ -21,8 +21,8 @@
 #include <boost/math/special_functions/round.hpp>
 #include <boost/math/special_functions/sign.hpp>
 
-static const int32_t MAX_FREQ_WORD = boost::numeric::bounds<boost::int32_t>::highest();
-static const int32_t MIN_FREQ_WORD = boost::numeric::bounds<boost::int32_t>::lowest();
+static const int32_t MAX_FREQ_WORD = boost::numeric::bounds<int32_t>::highest();
+static const int32_t MIN_FREQ_WORD = boost::numeric::bounds<int32_t>::lowest();
 
 void get_freq_and_freq_word(
         const double requested_freq,
diff --git a/host/lib/usrp/cores/gpio_atr_3000.cpp b/host/lib/usrp/cores/gpio_atr_3000.cpp
index 5844af601..6df592e1b 100644
--- a/host/lib/usrp/cores/gpio_atr_3000.cpp
+++ b/host/lib/usrp/cores/gpio_atr_3000.cpp
@@ -58,7 +58,7 @@ public:
         _atr_disable_reg.initialize(*_iface, true);
     }
 
-    virtual void set_atr_mode(const gpio_atr_mode_t mode, const boost::uint32_t mask)
+    virtual void set_atr_mode(const gpio_atr_mode_t mode, const uint32_t mask)
     {
         //Each bit in the "ATR Disable" register determines whether the respective bit in the GPIO
         //output bus is driven by the ATR engine or a static register.
@@ -70,7 +70,7 @@ public:
         _atr_disable_reg.flush();
     }
 
-    virtual void set_gpio_ddr(const gpio_ddr_t dir, const boost::uint32_t mask)
+    virtual void set_gpio_ddr(const gpio_ddr_t dir, const uint32_t mask)
     {
         //Each bit in the "DDR" register determines whether the respective bit in the GPIO
         //bus is an input or an output.
@@ -82,7 +82,7 @@ public:
         _ddr_reg.flush();
     }
 
-    virtual void set_atr_reg(const gpio_atr_reg_t atr, const boost::uint32_t value, const boost::uint32_t mask = MASK_SET_ALL)
+    virtual void set_atr_reg(const gpio_atr_reg_t atr, const uint32_t value, const uint32_t mask = MASK_SET_ALL)
     {
         //Set the value of the specified ATR register. For bits with ATR Disable set to 1,
         //the IDLE register will hold the output state
@@ -102,7 +102,7 @@ public:
         reg->flush();
     }
 
-    virtual void set_gpio_out(const boost::uint32_t value, const boost::uint32_t mask = MASK_SET_ALL) {
+    virtual void set_gpio_out(const uint32_t value, const uint32_t mask = MASK_SET_ALL) {
         //Set the value of the specified GPIO output register.
         //This setting will only get applied to all bits in the "mask" that are 1. All other
         //bits will retain their old value.
@@ -113,7 +113,7 @@ public:
         _atr_idle_reg.flush();
     }
 
-    virtual boost::uint32_t read_gpio()
+    virtual uint32_t read_gpio()
     {
         //Read the state of the GPIO pins
         //If a pin is configured as an input, reads the actual value of the pin
@@ -125,7 +125,7 @@ public:
         }
     }
 
-    inline virtual void set_gpio_attr(const gpio_attr_t attr, const boost::uint32_t value)
+    inline virtual void set_gpio_attr(const gpio_attr_t attr, const uint32_t value)
     {
         //An attribute based API to configure all settings for the GPIO bus in one function
         //call. This API does not have a mask so it configures all bits at the same time.
@@ -175,12 +175,12 @@ protected:
             uhd::soft_reg32_wo_t::set(REGISTER, 0);
         }
 
-        virtual void set_with_mask(const boost::uint32_t value, const boost::uint32_t mask) {
+        virtual void set_with_mask(const uint32_t value, const uint32_t mask) {
             uhd::soft_reg32_wo_t::set(REGISTER,
                 (value&mask)|(uhd::soft_reg32_wo_t::get(REGISTER)&(~mask)));
         }
 
-        virtual boost::uint32_t get() {
+        virtual uint32_t get() {
             return uhd::soft_reg32_wo_t::get(uhd::soft_reg32_wo_t::REGISTER);
         }
 
@@ -197,19 +197,19 @@ protected:
             _atr_disable_reg(atr_disable_reg)
         { }
 
-        virtual void set_with_mask(const boost::uint32_t value, const boost::uint32_t mask) {
+        virtual void set_with_mask(const uint32_t value, const uint32_t mask) {
             _atr_idle_cache = (value&mask)|(_atr_idle_cache&(~mask));
         }
 
-        virtual boost::uint32_t get() {
+        virtual uint32_t get() {
             return _atr_idle_cache;
         }
 
-        void set_gpio_out_with_mask(const boost::uint32_t value, const boost::uint32_t mask) {
+        void set_gpio_out_with_mask(const uint32_t value, const uint32_t mask) {
             _gpio_out_cache = (value&mask)|(_gpio_out_cache&(~mask));
         }
 
-        virtual boost::uint32_t get_gpio_out() {
+        virtual uint32_t get_gpio_out() {
             return _gpio_out_cache;
         }
 
@@ -222,8 +222,8 @@ protected:
         }
 
     private:
-        boost::uint32_t _atr_idle_cache;
-        boost::uint32_t _gpio_out_cache;
+        uint32_t _atr_idle_cache;
+        uint32_t _gpio_out_cache;
         masked_reg_t&   _atr_disable_reg;
     };
 
@@ -260,34 +260,34 @@ public:
     db_gpio_atr_3000_impl(wb_iface::sptr iface, const wb_iface::wb_addr_type base, const wb_iface::wb_addr_type rb_addr):
         gpio_atr_3000_impl(iface, base, rb_addr) { /* NOP */ }
 
-    inline void set_pin_ctrl(const db_unit_t unit, const boost::uint32_t value, const boost::uint32_t mask)
+    inline void set_pin_ctrl(const db_unit_t unit, const uint32_t value, const uint32_t mask)
     {
         gpio_atr_3000_impl::set_atr_mode(MODE_ATR,  compute_mask(unit, value&mask));
         gpio_atr_3000_impl::set_atr_mode(MODE_GPIO, compute_mask(unit, (~value)&mask));
     }
 
-    inline boost::uint32_t get_pin_ctrl(const db_unit_t unit)
+    inline uint32_t get_pin_ctrl(const db_unit_t unit)
     {
         return (~_atr_disable_reg.get()) >> compute_shift(unit);
     }
 
-    inline void set_gpio_ddr(const db_unit_t unit, const boost::uint32_t value, const boost::uint32_t mask)
+    inline void set_gpio_ddr(const db_unit_t unit, const uint32_t value, const uint32_t mask)
     {
         gpio_atr_3000_impl::set_gpio_ddr(DDR_OUTPUT, compute_mask(unit, value&mask));
         gpio_atr_3000_impl::set_gpio_ddr(DDR_INPUT,  compute_mask(unit, (~value)&mask));
     }
 
-    inline boost::uint32_t get_gpio_ddr(const db_unit_t unit)
+    inline uint32_t get_gpio_ddr(const db_unit_t unit)
     {
         return _ddr_reg.get() >> compute_shift(unit);
     }
 
-    inline void set_atr_reg(const db_unit_t unit, const gpio_atr_reg_t atr, const boost::uint32_t value, const boost::uint32_t mask)
+    inline void set_atr_reg(const db_unit_t unit, const gpio_atr_reg_t atr, const uint32_t value, const uint32_t mask)
     {
         gpio_atr_3000_impl::set_atr_reg(atr, value << compute_shift(unit), compute_mask(unit, mask));
     }
 
-    inline boost::uint32_t get_atr_reg(const db_unit_t unit, const gpio_atr_reg_t atr)
+    inline uint32_t get_atr_reg(const db_unit_t unit, const gpio_atr_reg_t atr)
     {
         masked_reg_t* reg = NULL;
         switch (atr) {
@@ -300,25 +300,25 @@ public:
         return (reg->get() & compute_mask(unit, MASK_SET_ALL)) >> compute_shift(unit);
     }
 
-    inline void set_gpio_out(const db_unit_t unit, const boost::uint32_t value, const boost::uint32_t mask)
+    inline void set_gpio_out(const db_unit_t unit, const uint32_t value, const uint32_t mask)
     {
         gpio_atr_3000_impl::set_gpio_out(
-            static_cast<boost::uint32_t>(value) << compute_shift(unit),
+            static_cast<uint32_t>(value) << compute_shift(unit),
             compute_mask(unit, mask));
     }
 
-    inline boost::uint32_t get_gpio_out(const db_unit_t unit)
+    inline uint32_t get_gpio_out(const db_unit_t unit)
     {
         return (_atr_idle_reg.get_gpio_out() & compute_mask(unit, MASK_SET_ALL)) >> compute_shift(unit);
     }
 
-    inline boost::uint32_t read_gpio(const db_unit_t unit)
+    inline uint32_t read_gpio(const db_unit_t unit)
     {
         return (gpio_atr_3000_impl::read_gpio() & compute_mask(unit, MASK_SET_ALL)) >> compute_shift(unit);
     }
 
 private:
-    inline boost::uint32_t compute_shift(const db_unit_t unit) {
+    inline uint32_t compute_shift(const db_unit_t unit) {
         switch (unit) {
         case dboard_iface::UNIT_RX: return 0;
         case dboard_iface::UNIT_TX: return 16;
@@ -326,8 +326,8 @@ private:
         }
     }
 
-    inline boost::uint32_t compute_mask(const db_unit_t unit, const boost::uint32_t mask) {
-        boost::uint32_t tmp_mask = (unit == dboard_iface::UNIT_BOTH) ? mask : (mask & 0xFFFF);
+    inline uint32_t compute_mask(const db_unit_t unit, const uint32_t mask) {
+        uint32_t tmp_mask = (unit == dboard_iface::UNIT_BOTH) ? mask : (mask & 0xFFFF);
         return tmp_mask << (compute_shift(unit));
     }
 };
diff --git a/host/lib/usrp/cores/gpio_atr_3000.hpp b/host/lib/usrp/cores/gpio_atr_3000.hpp
index 7b90429fe..1e7c304fa 100644
--- a/host/lib/usrp/cores/gpio_atr_3000.hpp
+++ b/host/lib/usrp/cores/gpio_atr_3000.hpp
@@ -30,7 +30,7 @@ class gpio_atr_3000 : boost::noncopyable {
 public:
     typedef boost::shared_ptr<gpio_atr_3000> sptr;
 
-    static const boost::uint32_t MASK_SET_ALL = 0xFFFFFFFF;
+    static const uint32_t MASK_SET_ALL = 0xFFFFFFFF;
 
     virtual ~gpio_atr_3000(void) {};
 
@@ -61,7 +61,7 @@ public:
      * \param mode the mode to apply {ATR = outputs driven by ATR state machine, GPIO = outputs static}
      * \param mask apply the mode to all non-zero bits in the mask
      */
-    virtual void set_atr_mode(const gpio_atr_mode_t mode, const boost::uint32_t mask) = 0;
+    virtual void set_atr_mode(const gpio_atr_mode_t mode, const uint32_t mask) = 0;
 
     /*!
      * Select the data direction for all bits in the mask
@@ -69,7 +69,7 @@ public:
      * \param dir the direction {OUTPUT, INPUT}
      * \param mask apply the mode to all non-zero bits in the mask
      */
-    virtual void set_gpio_ddr(const gpio_ddr_t dir, const boost::uint32_t mask) = 0;
+    virtual void set_gpio_ddr(const gpio_ddr_t dir, const uint32_t mask) = 0;
 
     /*!
      * Write the specified (masked) value to the ATR register
@@ -78,7 +78,7 @@ public:
      * \param value the value to write
      * \param mask only writes to the bits where mask is non-zero
      */
-    virtual void set_atr_reg(const gpio_atr_reg_t atr, const boost::uint32_t value, const boost::uint32_t mask = MASK_SET_ALL) = 0;
+    virtual void set_atr_reg(const gpio_atr_reg_t atr, const uint32_t value, const uint32_t mask = MASK_SET_ALL) = 0;
 
     /*!
      * Write to a static GPIO output
@@ -86,7 +86,7 @@ public:
      * \param value the value to write
      * \param mask only writes to the bits where mask is non-zero
      */
-    virtual void set_gpio_out(const boost::uint32_t value, const boost::uint32_t mask = MASK_SET_ALL) = 0;
+    virtual void set_gpio_out(const uint32_t value, const uint32_t mask = MASK_SET_ALL) = 0;
 
     /*!
      * Read the state of the GPIO pins
@@ -95,7 +95,7 @@ public:
      *
      * \return the value read back
      */
-    virtual boost::uint32_t read_gpio() = 0;
+    virtual uint32_t read_gpio() = 0;
 
     /*!
      * Set a GPIO attribute
@@ -103,7 +103,7 @@ public:
      * \param attr the attribute to set
      * \param value the value to write to the attribute
      */
-    virtual void set_gpio_attr(const gpio_attr_t attr, const boost::uint32_t value) = 0;
+    virtual void set_gpio_attr(const gpio_attr_t attr, const uint32_t value) = 0;
 };
 
 class db_gpio_atr_3000 {
@@ -132,9 +132,9 @@ public:
      * \param unit the side of the daughterboard interface to configure (TX or RX)
      * \param value if value[i] is 1, the i'th bit is in ATR mode otherwise it is in GPIO mode
      */
-    virtual void set_pin_ctrl(const db_unit_t unit, const boost::uint32_t value, const boost::uint32_t mask) = 0;
+    virtual void set_pin_ctrl(const db_unit_t unit, const uint32_t value, const uint32_t mask) = 0;
 
-    virtual boost::uint32_t get_pin_ctrl(const db_unit_t unit) = 0;
+    virtual uint32_t get_pin_ctrl(const db_unit_t unit) = 0;
 
     /*!
      * Configure the direction for all pins in the daughterboard connector
@@ -142,9 +142,9 @@ public:
      * \param unit the side of the daughterboard interface to configure (TX or RX)
      * \param value if value[i] is 1, the i'th bit is an output otherwise it is an input
      */
-    virtual void set_gpio_ddr(const db_unit_t unit, const boost::uint32_t value, const boost::uint32_t mask) = 0;
+    virtual void set_gpio_ddr(const db_unit_t unit, const uint32_t value, const uint32_t mask) = 0;
 
-    virtual boost::uint32_t get_gpio_ddr(const db_unit_t unit) = 0;
+    virtual uint32_t get_gpio_ddr(const db_unit_t unit) = 0;
 
     /*!
      * Write the specified value to the ATR register (all bits)
@@ -153,9 +153,9 @@ public:
      * \param unit the side of the daughterboard interface to configure (TX or RX)
      * \param value the value to write
      */
-    virtual void set_atr_reg(const db_unit_t unit, const gpio_atr_reg_t atr, const boost::uint32_t value, const boost::uint32_t mask) = 0;
+    virtual void set_atr_reg(const db_unit_t unit, const gpio_atr_reg_t atr, const uint32_t value, const uint32_t mask) = 0;
 
-    virtual boost::uint32_t get_atr_reg(const db_unit_t unit, const gpio_atr_reg_t atr) = 0;
+    virtual uint32_t get_atr_reg(const db_unit_t unit, const gpio_atr_reg_t atr) = 0;
 
     /*!
      * Write the specified value to the GPIO register (all bits)
@@ -163,9 +163,9 @@ public:
      * \param atr the type of ATR register to write to {IDLE, RX, TX, FDX}
      * \param value the value to write
      */
-    virtual void set_gpio_out(const db_unit_t unit, const boost::uint32_t value, const boost::uint32_t mask) = 0;
+    virtual void set_gpio_out(const db_unit_t unit, const uint32_t value, const uint32_t mask) = 0;
 
-    virtual boost::uint32_t get_gpio_out(const db_unit_t unit) = 0;
+    virtual uint32_t get_gpio_out(const db_unit_t unit) = 0;
 
     /*!
      * Read the state of the GPIO pins
@@ -175,7 +175,7 @@ public:
      * \param unit the side of the daughterboard interface to configure (TX or RX)
      * \return the value read back
      */
-    virtual boost::uint32_t read_gpio(const db_unit_t unit) = 0;
+    virtual uint32_t read_gpio(const db_unit_t unit) = 0;
 };
 
 }}} //namespaces
diff --git a/host/lib/usrp/cores/gpio_core_200.cpp b/host/lib/usrp/cores/gpio_core_200.cpp
index 8ada95b1f..3bce8e078 100644
--- a/host/lib/usrp/cores/gpio_core_200.cpp
+++ b/host/lib/usrp/cores/gpio_core_200.cpp
@@ -41,18 +41,18 @@ public:
     gpio_core_200_impl(wb_iface::sptr iface, const size_t base, const size_t rb_addr):
         _iface(iface), _base(base), _rb_addr(rb_addr), _first_atr(true) { /* NOP */ }
 
-    void set_pin_ctrl(const unit_t unit, const boost::uint16_t value, const boost::uint16_t mask){
+    void set_pin_ctrl(const unit_t unit, const uint16_t value, const uint16_t mask){
         if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
         shadow_it(_pin_ctrl[unit], value, mask);
         update(); //full update
     }
 
-    boost::uint16_t get_pin_ctrl(unit_t unit){
+    uint16_t get_pin_ctrl(unit_t unit){
         if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
         return _pin_ctrl[unit];
     }
 
-    void set_atr_reg(const unit_t unit, const atr_reg_t atr, const boost::uint16_t value, const boost::uint16_t mask){
+    void set_atr_reg(const unit_t unit, const atr_reg_t atr, const uint16_t value, const uint16_t mask){
         if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
         shadow_it(_atr_regs[unit][atr], value, mask);
         if (_first_atr)
@@ -65,39 +65,39 @@ public:
             update(atr);
     }
 
-    boost::uint16_t get_atr_reg(unit_t unit, atr_reg_t reg){
+    uint16_t get_atr_reg(unit_t unit, atr_reg_t reg){
         if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
         return _atr_regs[unit][reg];
     }
 
-    void set_gpio_ddr(const unit_t unit, const boost::uint16_t value, const boost::uint16_t mask){
+    void set_gpio_ddr(const unit_t unit, const uint16_t value, const uint16_t mask){
         if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
         shadow_it(_gpio_ddr[unit], value, mask);
         _iface->poke32(REG_GPIO_DDR, //update the 32 bit register
-            (boost::uint32_t(_gpio_ddr[dboard_iface::UNIT_RX]) << shift_by_unit(dboard_iface::UNIT_RX)) |
-            (boost::uint32_t(_gpio_ddr[dboard_iface::UNIT_TX]) << shift_by_unit(dboard_iface::UNIT_TX))
+            (uint32_t(_gpio_ddr[dboard_iface::UNIT_RX]) << shift_by_unit(dboard_iface::UNIT_RX)) |
+            (uint32_t(_gpio_ddr[dboard_iface::UNIT_TX]) << shift_by_unit(dboard_iface::UNIT_TX))
         );
     }
 
-    boost::uint16_t get_gpio_ddr(unit_t unit){
+    uint16_t get_gpio_ddr(unit_t unit){
         if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
         return _gpio_ddr[unit];
     }
 
-    void set_gpio_out(const unit_t unit, const boost::uint16_t value, const boost::uint16_t mask){
+    void set_gpio_out(const unit_t unit, const uint16_t value, const uint16_t mask){
         if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
         shadow_it(_gpio_out[unit], value, mask);
         this->update(); //full update
     }
 
-    boost::uint16_t get_gpio_out(unit_t unit){
+    uint16_t get_gpio_out(unit_t unit){
         if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
         return _gpio_out[unit];
     }
 
-    boost::uint16_t read_gpio(const unit_t unit){
+    uint16_t read_gpio(const unit_t unit){
         if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
-        return boost::uint16_t(_iface->peek32(_rb_addr) >> shift_by_unit(unit));
+        return uint16_t(_iface->peek32(_rb_addr) >> shift_by_unit(unit));
     }
 
 private:
@@ -105,10 +105,10 @@ private:
     const size_t _base;
     const size_t _rb_addr;
     bool _first_atr;
-    uhd::dict<size_t, boost::uint32_t> _update_cache;
+    uhd::dict<size_t, uint32_t> _update_cache;
 
-    uhd::dict<unit_t, boost::uint16_t> _pin_ctrl, _gpio_out, _gpio_ddr;
-    uhd::dict<unit_t, uhd::dict<atr_reg_t, boost::uint16_t> > _atr_regs;
+    uhd::dict<unit_t, uint16_t> _pin_ctrl, _gpio_out, _gpio_ddr;
+    uhd::dict<unit_t, uhd::dict<atr_reg_t, uint16_t> > _atr_regs;
 
     unsigned shift_by_unit(const unit_t unit){
         return (unit == dboard_iface::UNIT_RX)? 0 : 16;
@@ -140,18 +140,18 @@ private:
         default:
             UHD_THROW_INVALID_CODE_PATH();
         }
-        const boost::uint32_t atr_val =
-            (boost::uint32_t(_atr_regs[dboard_iface::UNIT_RX][atr]) << shift_by_unit(dboard_iface::UNIT_RX)) |
-            (boost::uint32_t(_atr_regs[dboard_iface::UNIT_TX][atr]) << shift_by_unit(dboard_iface::UNIT_TX));
-
-        const boost::uint32_t gpio_val =
-            (boost::uint32_t(_gpio_out[dboard_iface::UNIT_RX]) << shift_by_unit(dboard_iface::UNIT_RX)) |
-            (boost::uint32_t(_gpio_out[dboard_iface::UNIT_TX]) << shift_by_unit(dboard_iface::UNIT_TX));
-
-        const boost::uint32_t ctrl =
-            (boost::uint32_t(_pin_ctrl[dboard_iface::UNIT_RX]) << shift_by_unit(dboard_iface::UNIT_RX)) |
-            (boost::uint32_t(_pin_ctrl[dboard_iface::UNIT_TX]) << shift_by_unit(dboard_iface::UNIT_TX));
-        const boost::uint32_t val = (ctrl & atr_val) | ((~ctrl) & gpio_val);
+        const uint32_t atr_val =
+            (uint32_t(_atr_regs[dboard_iface::UNIT_RX][atr]) << shift_by_unit(dboard_iface::UNIT_RX)) |
+            (uint32_t(_atr_regs[dboard_iface::UNIT_TX][atr]) << shift_by_unit(dboard_iface::UNIT_TX));
+
+        const uint32_t gpio_val =
+            (uint32_t(_gpio_out[dboard_iface::UNIT_RX]) << shift_by_unit(dboard_iface::UNIT_RX)) |
+            (uint32_t(_gpio_out[dboard_iface::UNIT_TX]) << shift_by_unit(dboard_iface::UNIT_TX));
+
+        const uint32_t ctrl =
+            (uint32_t(_pin_ctrl[dboard_iface::UNIT_RX]) << shift_by_unit(dboard_iface::UNIT_RX)) |
+            (uint32_t(_pin_ctrl[dboard_iface::UNIT_TX]) << shift_by_unit(dboard_iface::UNIT_TX));
+        const uint32_t val = (ctrl & atr_val) | ((~ctrl) & gpio_val);
         if (not _update_cache.has_key(addr) or _update_cache[addr] != val)
         {
             _iface->poke32(addr, val);
@@ -182,7 +182,7 @@ public:
     }
 
 
-    void set_atr_reg(const atr_reg_t atr, const boost::uint32_t value){
+    void set_atr_reg(const atr_reg_t atr, const uint32_t value){
         if (atr == gpio_atr::ATR_REG_IDLE)
             _iface->poke32(REG_GPIO_IDLE, value);
         else if (atr == gpio_atr::ATR_REG_TX_ONLY)
@@ -195,7 +195,7 @@ public:
             UHD_THROW_INVALID_CODE_PATH();
     }
 
-    void set_all_regs(const boost::uint32_t value){
+    void set_all_regs(const uint32_t value){
         set_atr_reg(gpio_atr::ATR_REG_IDLE,        value);
         set_atr_reg(gpio_atr::ATR_REG_TX_ONLY,     value);
         set_atr_reg(gpio_atr::ATR_REG_RX_ONLY,     value);
diff --git a/host/lib/usrp/cores/gpio_core_200.hpp b/host/lib/usrp/cores/gpio_core_200.hpp
index c697f0e77..95362de1b 100644
--- a/host/lib/usrp/cores/gpio_core_200.hpp
+++ b/host/lib/usrp/cores/gpio_core_200.hpp
@@ -22,7 +22,7 @@
 #include <uhd/usrp/dboard_iface.hpp>
 #include <uhd/usrp/gpio_defs.hpp>
 #include <boost/assign.hpp>
-#include <boost/cstdint.hpp>
+#include <stdint.h>
 #include <boost/utility.hpp>
 #include <boost/shared_ptr.hpp>
 #include <uhd/types/wb_iface.hpp>
@@ -43,27 +43,27 @@ public:
 
     //! 1 = ATR
     virtual void set_pin_ctrl(
-        const unit_t unit, const boost::uint16_t value, const boost::uint16_t mask) = 0;
+        const unit_t unit, const uint16_t value, const uint16_t mask) = 0;
 
-    virtual boost::uint16_t get_pin_ctrl(unit_t unit) = 0;
+    virtual uint16_t get_pin_ctrl(unit_t unit) = 0;
 
     virtual void set_atr_reg(
-        const unit_t unit, const atr_reg_t atr, const boost::uint16_t value, const boost::uint16_t mask) = 0;
+        const unit_t unit, const atr_reg_t atr, const uint16_t value, const uint16_t mask) = 0;
 
-    virtual boost::uint16_t get_atr_reg(unit_t unit, atr_reg_t reg) = 0;
+    virtual uint16_t get_atr_reg(unit_t unit, atr_reg_t reg) = 0;
 
     //! 1 = OUTPUT
     virtual void set_gpio_ddr(
-        const unit_t unit, const boost::uint16_t value, const boost::uint16_t mask) = 0;
+        const unit_t unit, const uint16_t value, const uint16_t mask) = 0;
 
-    virtual boost::uint16_t get_gpio_ddr(unit_t unit) = 0;
+    virtual uint16_t get_gpio_ddr(unit_t unit) = 0;
 
     virtual void set_gpio_out(
-        const unit_t unit, const boost::uint16_t value, const boost::uint16_t mask) = 0;
+        const unit_t unit, const uint16_t value, const uint16_t mask) = 0;
 
-    virtual boost::uint16_t get_gpio_out(unit_t unit) = 0;
+    virtual uint16_t get_gpio_out(unit_t unit) = 0;
 
-    virtual boost::uint16_t read_gpio(const unit_t unit) = 0;
+    virtual uint16_t read_gpio(const unit_t unit) = 0;
 };
 
 //! Simple wrapper for 32 bit write only
@@ -79,9 +79,9 @@ public:
 
     virtual void set_ddr_reg() = 0;
 
-    virtual void set_atr_reg(const atr_reg_t atr, const boost::uint32_t value) = 0;
+    virtual void set_atr_reg(const atr_reg_t atr, const uint32_t value) = 0;
 
-    virtual void set_all_regs(const boost::uint32_t value) = 0;
+    virtual void set_all_regs(const uint32_t value) = 0;
 };
 
 #endif /* INCLUDED_LIBUHD_USRP_GPIO_CORE_200_HPP */
diff --git a/host/lib/usrp/cores/i2c_core_100.cpp b/host/lib/usrp/cores/i2c_core_100.cpp
index 796447e0c..029b6eaa7 100644
--- a/host/lib/usrp/cores/i2c_core_100.cpp
+++ b/host/lib/usrp/cores/i2c_core_100.cpp
@@ -65,16 +65,16 @@ public:
         //init I2C FPGA interface.
         _iface->poke16(REG_I2C_CTRL, 0x0000);
         //set prescalers to operate at 400kHz: WB_CLK is 64MHz...
-        static const boost::uint32_t i2c_datarate = 400000;
-        static const boost::uint32_t wishbone_clk = 64000000; //FIXME should go somewhere else
-        boost::uint16_t prescaler = wishbone_clk / (i2c_datarate*5) - 1;
+        static const uint32_t i2c_datarate = 400000;
+        static const uint32_t wishbone_clk = 64000000; //FIXME should go somewhere else
+        uint16_t prescaler = wishbone_clk / (i2c_datarate*5) - 1;
         _iface->poke16(REG_I2C_PRESCALER_LO, prescaler & 0xFF);
         _iface->poke16(REG_I2C_PRESCALER_HI, (prescaler >> 8) & 0xFF);
         _iface->poke16(REG_I2C_CTRL, I2C_CTRL_EN); //enable I2C core
     }
 
     void write_i2c(
-        boost::uint16_t addr,
+        uint16_t addr,
         const byte_vector_t &bytes
     ){
         _iface->poke16(REG_I2C_DATA, (addr << 1) | 0); //addr and read bit (0)
@@ -97,7 +97,7 @@ public:
     }
 
     byte_vector_t read_i2c(
-        boost::uint16_t addr,
+        uint16_t addr,
         size_t num_bytes
     ){
         byte_vector_t bytes;
@@ -116,7 +116,7 @@ public:
         for (size_t i = 0; i < num_bytes; i++) {
             _iface->poke16(REG_I2C_CMD_STATUS, I2C_CMD_RD | ((num_bytes == i+1) ? (I2C_CMD_STOP | I2C_CMD_NACK) : 0));
             i2c_wait();
-            bytes.push_back(boost::uint8_t(_iface->peek16(REG_I2C_DATA)));
+            bytes.push_back(uint8_t(_iface->peek16(REG_I2C_DATA)));
         }
         return bytes;
     }
diff --git a/host/lib/usrp/cores/i2c_core_100_wb32.cpp b/host/lib/usrp/cores/i2c_core_100_wb32.cpp
index 530267f6c..099b80447 100644
--- a/host/lib/usrp/cores/i2c_core_100_wb32.cpp
+++ b/host/lib/usrp/cores/i2c_core_100_wb32.cpp
@@ -69,14 +69,14 @@ public:
 
     void set_clock_rate(const double rate)
     {
-        static const boost::uint32_t i2c_datarate = 400000;
-        boost::uint16_t prescaler = boost::uint16_t(rate / (i2c_datarate*5) - 1);
+        static const uint32_t i2c_datarate = 400000;
+        uint16_t prescaler = uint16_t(rate / (i2c_datarate*5) - 1);
         _iface->poke32(REG_I2C_PRESCALER_LO, prescaler & 0xFF);
         _iface->poke32(REG_I2C_PRESCALER_HI, (prescaler >> 8) & 0xFF);
     }
 
     void write_i2c(
-        boost::uint16_t addr,
+        uint16_t addr,
         const byte_vector_t &bytes
     ){
         _iface->poke32(REG_I2C_DATA, (addr << 1) | 0); //addr and read bit (0)
@@ -99,7 +99,7 @@ public:
     }
 
     byte_vector_t read_i2c(
-        boost::uint16_t addr,
+        uint16_t addr,
         size_t num_bytes
     ){
         byte_vector_t bytes;
@@ -118,16 +118,16 @@ public:
         for (size_t i = 0; i < num_bytes; i++) {
             _iface->poke32(REG_I2C_CMD_STATUS, I2C_CMD_RD | ((num_bytes == i+1) ? (I2C_CMD_STOP | I2C_CMD_NACK) : 0));
             i2c_wait();
-            bytes.push_back(boost::uint8_t(_iface->peek32(REG_I2C_DATA)));
+            bytes.push_back(uint8_t(_iface->peek32(REG_I2C_DATA)));
         }
         return bytes;
     }
 
     //override read_eeprom so we can write once, read all N bytes
     //the default implementation calls read i2c once per byte
-    byte_vector_t read_eeprom(boost::uint16_t addr, boost::uint16_t offset, size_t num_bytes)
+    byte_vector_t read_eeprom(uint16_t addr, uint16_t offset, size_t num_bytes)
     {
-        this->write_i2c(addr, byte_vector_t(1, boost::uint8_t(offset)));
+        this->write_i2c(addr, byte_vector_t(1, uint8_t(offset)));
         return this->read_i2c(addr, num_bytes);
     }
 
diff --git a/host/lib/usrp/cores/i2c_core_200.cpp b/host/lib/usrp/cores/i2c_core_200.cpp
index 2f0f6f815..eae91253c 100644
--- a/host/lib/usrp/cores/i2c_core_200.cpp
+++ b/host/lib/usrp/cores/i2c_core_200.cpp
@@ -68,16 +68,16 @@ public:
         //init I2C FPGA interface.
         this->poke(REG_I2C_WR_CTRL, 0x0000);
         //set prescalers to operate at 400kHz: WB_CLK is 64MHz...
-        static const boost::uint32_t i2c_datarate = 400000;
-        static const boost::uint32_t wishbone_clk = 64000000; //FIXME should go somewhere else
-        boost::uint16_t prescaler = wishbone_clk / (i2c_datarate*5) - 1;
+        static const uint32_t i2c_datarate = 400000;
+        static const uint32_t wishbone_clk = 64000000; //FIXME should go somewhere else
+        uint16_t prescaler = wishbone_clk / (i2c_datarate*5) - 1;
         this->poke(REG_I2C_WR_PRESCALER_LO, prescaler & 0xFF);
         this->poke(REG_I2C_WR_PRESCALER_HI, (prescaler >> 8) & 0xFF);
         this->poke(REG_I2C_WR_CTRL, I2C_CTRL_EN); //enable I2C core
     }
 
     void write_i2c(
-        boost::uint16_t addr,
+        uint16_t addr,
         const byte_vector_t &bytes
     ){
         this->poke(REG_I2C_WR_DATA, (addr << 1) | 0); //addr and read bit (0)
@@ -100,7 +100,7 @@ public:
     }
 
     byte_vector_t read_i2c(
-        boost::uint16_t addr,
+        uint16_t addr,
         size_t num_bytes
     ){
         byte_vector_t bytes;
@@ -138,17 +138,17 @@ private:
         return (this->peek(REG_I2C_RD_ST) & I2C_ST_RXACK) == 0;
     }
 
-    void poke(const size_t what, const boost::uint8_t cmd)
+    void poke(const size_t what, const uint8_t cmd)
     {
         boost::mutex::scoped_lock lock(_mutex);
         _iface->poke32(_base, (what << 8) | cmd);
     }
 
-    boost::uint8_t peek(const size_t what)
+    uint8_t peek(const size_t what)
     {
         boost::mutex::scoped_lock lock(_mutex);
         _iface->poke32(_base, what << 8);
-        return boost::uint8_t(_iface->peek32(_readback));
+        return uint8_t(_iface->peek32(_readback));
     }
 
     wb_iface::sptr _iface;
diff --git a/host/lib/usrp/cores/radio_ctrl_core_3000.cpp b/host/lib/usrp/cores/radio_ctrl_core_3000.cpp
index 47cfaf3ca..2e405d735 100644
--- a/host/lib/usrp/cores/radio_ctrl_core_3000.cpp
+++ b/host/lib/usrp/cores/radio_ctrl_core_3000.cpp
@@ -48,7 +48,7 @@ public:
     radio_ctrl_core_3000_impl(const bool big_endian,
             uhd::transport::zero_copy_if::sptr ctrl_xport,
             uhd::transport::zero_copy_if::sptr resp_xport,
-            const boost::uint32_t sid, const std::string &name) :
+            const uint32_t sid, const std::string &name) :
             _link_type(vrt::if_packet_info_t::LINK_TYPE_CHDR), _packet_type(
                     vrt::if_packet_info_t::PACKET_TYPE_CONTEXT), _bige(
                     big_endian), _ctrl_xport(ctrl_xport), _resp_xport(
@@ -76,24 +76,24 @@ public:
     /*******************************************************************
      * Peek and poke 32 bit implementation
      ******************************************************************/
-    void poke32(const wb_addr_type addr, const boost::uint32_t data)
+    void poke32(const wb_addr_type addr, const uint32_t data)
     {
         boost::mutex::scoped_lock lock(_mutex);
         this->send_pkt(addr/4, data);
         this->wait_for_ack(false);
     }
 
-    boost::uint32_t peek32(const wb_addr_type addr)
+    uint32_t peek32(const wb_addr_type addr)
     {
         boost::mutex::scoped_lock lock(_mutex);
         this->send_pkt(SR_READBACK, addr/8);
-        const boost::uint64_t res = this->wait_for_ack(true);
-        const boost::uint32_t lo = boost::uint32_t(res & 0xffffffff);
-        const boost::uint32_t hi = boost::uint32_t(res >> 32);
+        const uint64_t res = this->wait_for_ack(true);
+        const uint32_t lo = uint32_t(res & 0xffffffff);
+        const uint32_t hi = uint32_t(res >> 32);
         return ((addr/4) & 0x1)? hi : lo;
     }
 
-    boost::uint64_t peek64(const wb_addr_type addr)
+    uint64_t peek64(const wb_addr_type addr)
     {
         boost::mutex::scoped_lock lock(_mutex);
         this->send_pkt(SR_READBACK, addr/8);
@@ -127,26 +127,26 @@ private:
     // This is the buffer type for messages in radio control core.
     struct resp_buff_type
     {
-        boost::uint32_t data[8];
+        uint32_t data[8];
     };
 
     /*******************************************************************
      * Primary control and interaction private methods
      ******************************************************************/
-    UHD_INLINE void send_pkt(const boost::uint32_t addr, const boost::uint32_t data = 0)
+    UHD_INLINE void send_pkt(const uint32_t addr, const uint32_t data = 0)
     {
         managed_send_buffer::sptr buff = _ctrl_xport->get_send_buff(0.0);
         if (not buff) {
             throw uhd::runtime_error("fifo ctrl timed out getting a send buffer");
         }
-        boost::uint32_t *pkt = buff->cast<boost::uint32_t *>();
+        uint32_t *pkt = buff->cast<uint32_t *>();
 
         //load packet info
         vrt::if_packet_info_t packet_info;
         packet_info.link_type = _link_type;
         packet_info.packet_type = _packet_type;
         packet_info.num_payload_words32 = 2;
-        packet_info.num_payload_bytes = packet_info.num_payload_words32*sizeof(boost::uint32_t);
+        packet_info.num_payload_bytes = packet_info.num_payload_words32*sizeof(uint32_t);
         packet_info.packet_count = _seq_out;
         packet_info.tsf = _time.to_ticks(_tick_rate);
         packet_info.sob = false;
@@ -168,12 +168,12 @@ private:
         //UHD_MSG(status) << boost::format("0x%08x, 0x%08x\n") % addr % data;
         //send the buffer over the interface
         _outstanding_seqs.push(_seq_out);
-        buff->commit(sizeof(boost::uint32_t)*(packet_info.num_packet_words32));
+        buff->commit(sizeof(uint32_t)*(packet_info.num_packet_words32));
 
         _seq_out++;//inc seq for next call
     }
 
-    UHD_INLINE boost::uint64_t wait_for_ack(const bool readback)
+    UHD_INLINE uint64_t wait_for_ack(const bool readback)
     {
         while (readback or (_outstanding_seqs.size() >= _resp_queue_size))
         {
@@ -186,7 +186,7 @@ private:
             vrt::if_packet_info_t packet_info;
             resp_buff_type resp_buff;
             memset(&resp_buff, 0x00, sizeof(resp_buff));
-            boost::uint32_t const *pkt = NULL;
+            uint32_t const *pkt = NULL;
             managed_recv_buffer::sptr buff;
 
             //get buffer from response endpoint - or die in timeout
@@ -202,8 +202,8 @@ private:
                 {
                     throw uhd::io_error(str(boost::format("Radio ctrl (%s) no response packet - %s") % _name % ex.what()));
                 }
-                pkt = buff->cast<const boost::uint32_t *>();
-                packet_info.num_packet_words32 = buff->size()/sizeof(boost::uint32_t);
+                pkt = buff->cast<const uint32_t *>();
+                packet_info.num_packet_words32 = buff->size()/sizeof(uint32_t);
             }
 
             //get buffer from response endpoint - or die in timeout
@@ -231,7 +231,7 @@ private:
                 }
 
                 pkt = resp_buff.data;
-                packet_info.num_packet_words32 = sizeof(resp_buff)/sizeof(boost::uint32_t);
+                packet_info.num_packet_words32 = sizeof(resp_buff)/sizeof(uint32_t);
             }
 
             //parse the buffer
@@ -260,7 +260,7 @@ private:
             try
             {
                 UHD_ASSERT_THROW(packet_info.has_sid);
-                UHD_ASSERT_THROW(packet_info.sid == boost::uint32_t((_sid >> 16) | (_sid << 16)));
+                UHD_ASSERT_THROW(packet_info.sid == uint32_t((_sid >> 16) | (_sid << 16)));
                 UHD_ASSERT_THROW(packet_info.packet_count == (seq_to_ack & 0xfff));
                 UHD_ASSERT_THROW(packet_info.num_payload_words32 == 2);
                 UHD_ASSERT_THROW(packet_info.packet_type == _packet_type);
@@ -273,8 +273,8 @@ private:
             //return the readback value
             if (readback and _outstanding_seqs.empty())
             {
-                const boost::uint64_t hi = (_bige)? uhd::ntohx(pkt[packet_info.num_header_words32+0]) : uhd::wtohx(pkt[packet_info.num_header_words32+0]);
-                const boost::uint64_t lo = (_bige)? uhd::ntohx(pkt[packet_info.num_header_words32+1]) : uhd::wtohx(pkt[packet_info.num_header_words32+1]);
+                const uint64_t hi = (_bige)? uhd::ntohx(pkt[packet_info.num_header_words32+0]) : uhd::wtohx(pkt[packet_info.num_header_words32+0]);
+                const uint64_t lo = (_bige)? uhd::ntohx(pkt[packet_info.num_header_words32+1]) : uhd::wtohx(pkt[packet_info.num_header_words32+1]);
                 return ((hi << 32) | lo);
             }
         }
@@ -292,7 +292,7 @@ private:
      */
     bool check_dump_queue(resp_buff_type& b) {
         const size_t min_buff_size = 8; // Same value as in b200_io_impl->handle_async_task
-        boost::uint32_t recv_sid = (((_sid)<<16)|((_sid)>>16));
+        uint32_t recv_sid = (((_sid)<<16)|((_sid)>>16));
         uhd::msg_task::msg_payload_t msg;
         do{
             msg = _async_task->get_msg_from_dump_queue(recv_sid);
@@ -306,7 +306,7 @@ private:
         return false;
     }
 
-    void push_response(const boost::uint32_t *buff)
+    void push_response(const uint32_t *buff)
     {
         resp_buff_type resp_buff;
         std::memcpy(resp_buff.data, buff, sizeof(resp_buff));
@@ -324,7 +324,7 @@ private:
     const uhd::transport::zero_copy_if::sptr _ctrl_xport;
     const uhd::transport::zero_copy_if::sptr _resp_xport;
     uhd::msg_task::sptr _async_task;
-    const boost::uint32_t _sid;
+    const uint32_t _sid;
     const std::string _name;
     boost::mutex _mutex;
     size_t _seq_out;
@@ -339,7 +339,7 @@ private:
 
 radio_ctrl_core_3000::sptr radio_ctrl_core_3000::make(const bool big_endian,
         zero_copy_if::sptr ctrl_xport, zero_copy_if::sptr resp_xport,
-        const boost::uint32_t sid, const std::string &name)
+        const uint32_t sid, const std::string &name)
 {
     return sptr(
             new radio_ctrl_core_3000_impl(big_endian, ctrl_xport, resp_xport,
diff --git a/host/lib/usrp/cores/radio_ctrl_core_3000.hpp b/host/lib/usrp/cores/radio_ctrl_core_3000.hpp
index c1cc1d372..3685ac1a1 100644
--- a/host/lib/usrp/cores/radio_ctrl_core_3000.hpp
+++ b/host/lib/usrp/cores/radio_ctrl_core_3000.hpp
@@ -41,7 +41,7 @@ public:
         const bool big_endian,
         uhd::transport::zero_copy_if::sptr ctrl_xport,
         uhd::transport::zero_copy_if::sptr resp_xport,
-        const boost::uint32_t sid,
+        const uint32_t sid,
         const std::string &name = "0"
     );
 
@@ -49,7 +49,7 @@ public:
     virtual void hold_task(uhd::msg_task::sptr task) = 0;
 
     //! Push a response externall (resp_xport is NULL)
-    virtual void push_response(const boost::uint32_t *buff) = 0;
+    virtual void push_response(const uint32_t *buff) = 0;
 
     //! Set the command time that will activate
     virtual void set_time(const uhd::time_spec_t &time) = 0;
diff --git a/host/lib/usrp/cores/rx_dsp_core_200.cpp b/host/lib/usrp/cores/rx_dsp_core_200.cpp
index e51862d3b..e781cfc6d 100644
--- a/host/lib/usrp/cores/rx_dsp_core_200.cpp
+++ b/host/lib/usrp/cores/rx_dsp_core_200.cpp
@@ -62,7 +62,7 @@ public:
     rx_dsp_core_200_impl(
         wb_iface::sptr iface,
         const size_t dsp_base, const size_t ctrl_base,
-        const boost::uint32_t sid, const bool lingering_packet
+        const uint32_t sid, const bool lingering_packet
     ):
         _iface(iface), _dsp_base(dsp_base), _ctrl_base(ctrl_base),  _sid(sid)
     {
@@ -128,22 +128,22 @@ public:
         boost::tie(inst_reload, inst_chain, inst_samps, inst_stop) = mode_to_inst[stream_cmd.stream_mode];
 
         //calculate the word from flags and length
-        boost::uint32_t cmd_word = 0;
-        cmd_word |= boost::uint32_t((stream_cmd.stream_now)? 1 : 0) << 31;
-        cmd_word |= boost::uint32_t((inst_chain)?            1 : 0) << 30;
-        cmd_word |= boost::uint32_t((inst_reload)?           1 : 0) << 29;
-        cmd_word |= boost::uint32_t((inst_stop)?             1 : 0) << 28;
+        uint32_t cmd_word = 0;
+        cmd_word |= uint32_t((stream_cmd.stream_now)? 1 : 0) << 31;
+        cmd_word |= uint32_t((inst_chain)?            1 : 0) << 30;
+        cmd_word |= uint32_t((inst_reload)?           1 : 0) << 29;
+        cmd_word |= uint32_t((inst_stop)?             1 : 0) << 28;
         cmd_word |= (inst_samps)? stream_cmd.num_samps : ((inst_stop)? 0 : 1);
 
         //issue the stream command
         _iface->poke32(REG_RX_CTRL_STREAM_CMD, cmd_word);
-        const boost::uint64_t ticks = (stream_cmd.stream_now)? 0 : stream_cmd.time_spec.to_ticks(_tick_rate);
-        _iface->poke32(REG_RX_CTRL_TIME_HI, boost::uint32_t(ticks >> 32));
-        _iface->poke32(REG_RX_CTRL_TIME_LO, boost::uint32_t(ticks >> 0)); //latches the command
+        const uint64_t ticks = (stream_cmd.stream_now)? 0 : stream_cmd.time_spec.to_ticks(_tick_rate);
+        _iface->poke32(REG_RX_CTRL_TIME_HI, uint32_t(ticks >> 32));
+        _iface->poke32(REG_RX_CTRL_TIME_LO, uint32_t(ticks >> 0)); //latches the command
     }
 
     void set_mux(const std::string &mode, const bool fe_swapped){
-        static const uhd::dict<std::string, boost::uint32_t> mode_to_mux = boost::assign::map_list_of
+        static const uhd::dict<std::string, uint32_t> mode_to_mux = boost::assign::map_list_of
             ("IQ", 0)
             ("QI", FLAG_DSP_RX_MUX_SWAP_IQ)
             ("I", FLAG_DSP_RX_MUX_REAL_MODE)
@@ -157,8 +157,8 @@ public:
     }
 
     void set_link_rate(const double rate){
-        //_link_rate = rate/sizeof(boost::uint32_t); //in samps/s
-        _link_rate = rate/sizeof(boost::uint16_t); //in samps/s (allows for 8sc)
+        //_link_rate = rate/sizeof(uint32_t); //in samps/s
+        _link_rate = rate/sizeof(uint16_t); //in samps/s (allows for 8sc)
     }
 
     uhd::meta_range_t get_host_rates(void){
@@ -214,7 +214,7 @@ public:
     void update_scalar(void){
         const double factor = 1.0 + std::max(ceil_log2(_scaling_adjustment), 0.0);
         const double target_scalar = (1 << 17)*_scaling_adjustment/_dsp_extra_scaling/factor;
-        const boost::int32_t actual_scalar = boost::math::iround(target_scalar);
+        const int32_t actual_scalar = boost::math::iround(target_scalar);
         _fxpt_scalar_correction = target_scalar/actual_scalar*factor; //should be small
         _iface->poke32(REG_DSP_RX_SCALE_IQ, actual_scalar);
     }
@@ -227,7 +227,7 @@ public:
         double actual_freq;
         int32_t freq_word;
         get_freq_and_freq_word(requested_freq, _tick_rate, actual_freq, freq_word);
-        _iface->poke32(REG_DSP_RX_FREQ, boost::uint32_t(freq_word));
+        _iface->poke32(REG_DSP_RX_FREQ, uint32_t(freq_word));
         return actual_freq;
     }
 
@@ -271,9 +271,9 @@ private:
     double _tick_rate, _link_rate;
     bool _continuous_streaming;
     double _scaling_adjustment, _dsp_extra_scaling, _host_extra_scaling, _fxpt_scalar_correction;
-    const boost::uint32_t _sid;
+    const uint32_t _sid;
 };
 
-rx_dsp_core_200::sptr rx_dsp_core_200::make(wb_iface::sptr iface, const size_t dsp_base, const size_t ctrl_base, const boost::uint32_t sid, const bool lingering_packet){
+rx_dsp_core_200::sptr rx_dsp_core_200::make(wb_iface::sptr iface, const size_t dsp_base, const size_t ctrl_base, const uint32_t sid, const bool lingering_packet){
     return sptr(new rx_dsp_core_200_impl(iface, dsp_base, ctrl_base, sid, lingering_packet));
 }
diff --git a/host/lib/usrp/cores/rx_dsp_core_200.hpp b/host/lib/usrp/cores/rx_dsp_core_200.hpp
index 1dc51fa24..a565ffebd 100644
--- a/host/lib/usrp/cores/rx_dsp_core_200.hpp
+++ b/host/lib/usrp/cores/rx_dsp_core_200.hpp
@@ -36,7 +36,7 @@ public:
     static sptr make(
         uhd::wb_iface::sptr iface,
         const size_t dsp_base, const size_t ctrl_base,
-        const boost::uint32_t sid, const bool lingering_packet = false
+        const uint32_t sid, const bool lingering_packet = false
     );
 
     virtual void clear(void) = 0;
diff --git a/host/lib/usrp/cores/rx_dsp_core_3000.cpp b/host/lib/usrp/cores/rx_dsp_core_3000.cpp
index eedbbef95..fdd73a7ac 100644
--- a/host/lib/usrp/cores/rx_dsp_core_3000.cpp
+++ b/host/lib/usrp/cores/rx_dsp_core_3000.cpp
@@ -81,7 +81,7 @@ public:
     }
 
     void set_mux(const uhd::usrp::fe_connection_t& fe_conn){
-        boost::uint32_t reg_val = 0;
+        uint32_t reg_val = 0;
         switch (fe_conn.get_sampling_mode()) {
         case uhd::usrp::fe_connection_t::REAL:
         case uhd::usrp::fe_connection_t::HETERODYNE:
@@ -122,8 +122,8 @@ public:
     }
 
     void set_link_rate(const double rate){
-        //_link_rate = rate/sizeof(boost::uint32_t); //in samps/s
-        _link_rate = rate/sizeof(boost::uint16_t); //in samps/s (allows for 8sc)
+        //_link_rate = rate/sizeof(uint32_t); //in samps/s
+        _link_rate = rate/sizeof(uint16_t); //in samps/s (allows for 8sc)
     }
 
     uhd::meta_range_t get_host_rates(void){
@@ -223,7 +223,7 @@ public:
     // Further more factor in OTW format which adds further gain factor to weight output samples correctly.
     void update_scalar(void){
         const double target_scalar = (1 << (_is_b200 ? 16 : 15))*_scaling_adjustment/_dsp_extra_scaling;
-        const boost::int32_t actual_scalar = boost::math::iround(target_scalar);
+        const int32_t actual_scalar = boost::math::iround(target_scalar);
         // Calculate the error introduced by using integer representation for the scalar, can be corrected in host later.
         _fxpt_scalar_correction = target_scalar/actual_scalar;
         // Write DDC with scaling correction for CIC and CORDIC that maximizes dynamic range in 32/16/12/8bits.
@@ -238,7 +238,7 @@ public:
         double actual_freq;
         int32_t freq_word;
         get_freq_and_freq_word(requested_freq + _dsp_freq_offset, _tick_rate, actual_freq, freq_word);
-        _iface->poke32(REG_DSP_RX_FREQ, boost::uint32_t(freq_word));
+        _iface->poke32(REG_DSP_RX_FREQ, uint32_t(freq_word));
         return actual_freq;
     }
 
diff --git a/host/lib/usrp/cores/rx_frontend_core_200.cpp b/host/lib/usrp/cores/rx_frontend_core_200.cpp
index 0a60bf87c..1ecc3e420 100644
--- a/host/lib/usrp/cores/rx_frontend_core_200.cpp
+++ b/host/lib/usrp/cores/rx_frontend_core_200.cpp
@@ -31,8 +31,8 @@ using namespace uhd;
 #define OFFSET_SET   (1ul << 30)
 #define FLAG_MASK (OFFSET_FIXED | OFFSET_SET)
 
-static boost::uint32_t fs_to_bits(const double num, const size_t bits){
-    return boost::int32_t(boost::math::round(num * (1 << (bits-1))));
+static uint32_t fs_to_bits(const double num, const size_t bits){
+    return int32_t(boost::math::round(num * (1 << (bits-1))));
 }
 
 rx_frontend_core_200::~rx_frontend_core_200(void){
@@ -69,7 +69,7 @@ public:
         return std::complex<double>(_i_dc_off/scaler, _q_dc_off/scaler);
     }
 
-    void set_dc_offset(const boost::uint32_t flags){
+    void set_dc_offset(const uint32_t flags){
         _iface->poke32(REG_RX_FE_OFFSET_I, flags | (_i_dc_off & ~FLAG_MASK));
         _iface->poke32(REG_RX_FE_OFFSET_Q, flags | (_q_dc_off & ~FLAG_MASK));
     }
@@ -96,7 +96,7 @@ public:
     }
 
 private:
-    boost::int32_t _i_dc_off, _q_dc_off;
+    int32_t _i_dc_off, _q_dc_off;
     wb_iface::sptr _iface;
     const size_t _base;
 };
diff --git a/host/lib/usrp/cores/rx_frontend_core_3000.cpp b/host/lib/usrp/cores/rx_frontend_core_3000.cpp
index 23197cf5a..1c4674a8a 100644
--- a/host/lib/usrp/cores/rx_frontend_core_3000.cpp
+++ b/host/lib/usrp/cores/rx_frontend_core_3000.cpp
@@ -46,8 +46,8 @@ using namespace uhd;
 
 using namespace uhd::usrp;
 
-static boost::uint32_t fs_to_bits(const double num, const size_t bits){
-    return boost::int32_t(boost::math::round(num * (1 << (bits-1))));
+static uint32_t fs_to_bits(const double num, const size_t bits){
+    return int32_t(boost::math::round(num * (1 << (bits-1))));
 }
 
 rx_frontend_core_3000::~rx_frontend_core_3000(void){
@@ -82,7 +82,7 @@ public:
     }
 
     void set_fe_connection(const fe_connection_t& fe_conn) {
-        boost::uint32_t mapping_reg_val = 0;
+        uint32_t mapping_reg_val = 0;
         switch (fe_conn.get_sampling_mode()) {
         case fe_connection_t::REAL:
         case fe_connection_t::HETERODYNE:
@@ -118,7 +118,7 @@ public:
         }
         int32_t freq_word;
         get_freq_and_freq_word(cordic_freq, _adc_rate, actual_cordic_freq, freq_word);
-        _iface->poke32(REG_RX_FE_HET_CORDIC_PHASE, boost::uint32_t(freq_word));
+        _iface->poke32(REG_RX_FE_HET_CORDIC_PHASE, uint32_t(freq_word));
 
         _fe_conn = fe_conn;
     }
@@ -137,7 +137,7 @@ public:
         return std::complex<double>(_i_dc_off/scaler, _q_dc_off/scaler);
     }
 
-    void _set_dc_offset(const boost::uint32_t flags) {
+    void _set_dc_offset(const uint32_t flags) {
         _iface->poke32(REG_RX_FE_OFFSET_I, flags | (_i_dc_off & ~FLAG_MASK));
         _iface->poke32(REG_RX_FE_OFFSET_Q, flags | (_q_dc_off & ~FLAG_MASK));
     }
@@ -174,7 +174,7 @@ public:
     }
 
 private:
-    boost::int32_t  _i_dc_off, _q_dc_off;
+    int32_t  _i_dc_off, _q_dc_off;
     double          _adc_rate;
     fe_connection_t _fe_conn;
     wb_iface::sptr  _iface;
diff --git a/host/lib/usrp/cores/rx_vita_core_3000.cpp b/host/lib/usrp/cores/rx_vita_core_3000.cpp
index 54c57c2d5..57868ff54 100644
--- a/host/lib/usrp/cores/rx_vita_core_3000.cpp
+++ b/host/lib/usrp/cores/rx_vita_core_3000.cpp
@@ -117,18 +117,18 @@ struct rx_vita_core_3000_impl : rx_vita_core_3000
         boost::tie(inst_reload, inst_chain, inst_samps, inst_stop) = mode_to_inst[stream_cmd.stream_mode];
 
         //calculate the word from flags and length
-        boost::uint32_t cmd_word = 0;
-        cmd_word |= boost::uint32_t((stream_cmd.stream_now)? 1 : 0) << 31;
-        cmd_word |= boost::uint32_t((inst_chain)?            1 : 0) << 30;
-        cmd_word |= boost::uint32_t((inst_reload)?           1 : 0) << 29;
-        cmd_word |= boost::uint32_t((inst_stop)?             1 : 0) << 28;
+        uint32_t cmd_word = 0;
+        cmd_word |= uint32_t((stream_cmd.stream_now)? 1 : 0) << 31;
+        cmd_word |= uint32_t((inst_chain)?            1 : 0) << 30;
+        cmd_word |= uint32_t((inst_reload)?           1 : 0) << 29;
+        cmd_word |= uint32_t((inst_stop)?             1 : 0) << 28;
         cmd_word |= (inst_samps)? stream_cmd.num_samps : ((inst_stop)? 0 : 1);
 
         //issue the stream command
         _iface->poke32(REG_CTRL_CMD, cmd_word);
-        const boost::uint64_t ticks = (stream_cmd.stream_now)? 0 : stream_cmd.time_spec.to_ticks(_tick_rate);
-        _iface->poke32(REG_CTRL_TIME_HI, boost::uint32_t(ticks >> 32));
-        _iface->poke32(REG_CTRL_TIME_LO, boost::uint32_t(ticks >> 0)); //latches the command
+        const uint64_t ticks = (stream_cmd.stream_now)? 0 : stream_cmd.time_spec.to_ticks(_tick_rate);
+        _iface->poke32(REG_CTRL_TIME_HI, uint32_t(ticks >> 32));
+        _iface->poke32(REG_CTRL_TIME_LO, uint32_t(ticks >> 0)); //latches the command
     }
 
     void set_tick_rate(const double rate)
@@ -136,7 +136,7 @@ struct rx_vita_core_3000_impl : rx_vita_core_3000
         _tick_rate = rate;
     }
 
-    void set_sid(const boost::uint32_t sid)
+    void set_sid(const uint32_t sid)
     {
         _iface->poke32(REG_FRAMER_SID, sid);
     }
diff --git a/host/lib/usrp/cores/rx_vita_core_3000.hpp b/host/lib/usrp/cores/rx_vita_core_3000.hpp
index cd718a190..94e901bf4 100644
--- a/host/lib/usrp/cores/rx_vita_core_3000.hpp
+++ b/host/lib/usrp/cores/rx_vita_core_3000.hpp
@@ -47,7 +47,7 @@ public:
 
     virtual void set_tick_rate(const double rate) = 0;
 
-    virtual void set_sid(const boost::uint32_t sid) = 0;
+    virtual void set_sid(const uint32_t sid) = 0;
 
     virtual void handle_overflow(void) = 0;
 
diff --git a/host/lib/usrp/cores/spi_core_100.cpp b/host/lib/usrp/cores/spi_core_100.cpp
index 71d92bcb6..22b163b14 100644
--- a/host/lib/usrp/cores/spi_core_100.cpp
+++ b/host/lib/usrp/cores/spi_core_100.cpp
@@ -48,10 +48,10 @@ public:
     spi_core_100_impl(wb_iface::sptr iface, const size_t base):
         _iface(iface), _base(base) { /* NOP */}
 
-    boost::uint32_t transact_spi(
+    uint32_t transact_spi(
         int which_slave,
         const spi_config_t &config,
-        boost::uint32_t data,
+        uint32_t data,
         size_t num_bits,
         bool readback
     ){
@@ -60,7 +60,7 @@ public:
         int edge_flags = ((config.miso_edge==spi_config_t::EDGE_FALL) ? SPI_CTRL_RXNEG : 0) |
                          ((config.mosi_edge==spi_config_t::EDGE_FALL) ? 0 : SPI_CTRL_TXNEG)
                          ;
-        boost::uint16_t ctrl = SPI_CTRL_ASS | (SPI_CTRL_CHAR_LEN_MASK & num_bits) | edge_flags;
+        uint16_t ctrl = SPI_CTRL_ASS | (SPI_CTRL_CHAR_LEN_MASK & num_bits) | edge_flags;
 
         spi_wait();
         _iface->poke16(REG_SPI_DIV, 0x0001); // = fpga_clk / 4
diff --git a/host/lib/usrp/cores/spi_core_3000.cpp b/host/lib/usrp/cores/spi_core_3000.cpp
index 01df71cec..78b0af1a3 100644
--- a/host/lib/usrp/cores/spi_core_3000.cpp
+++ b/host/lib/usrp/cores/spi_core_3000.cpp
@@ -40,10 +40,10 @@ public:
         this->set_divider(30);
     }
 
-    boost::uint32_t transact_spi(
+    uint32_t transact_spi(
         int which_slave,
         const spi_config_t &config,
-        boost::uint32_t data,
+        uint32_t data,
         size_t num_bits,
         bool readback
     ){
@@ -64,7 +64,7 @@ public:
         }
 
         //load control word
-        boost::uint32_t ctrl_word = 0;
+        uint32_t ctrl_word = 0;
         ctrl_word |= ((which_slave & 0xffffff) << 0);
         ctrl_word |= ((num_bits & 0x3f) << 24);
         if (config.mosi_edge == spi_config_t::EDGE_FALL) ctrl_word |= (1 << 31);
@@ -78,7 +78,7 @@ public:
         }
 
         //load data word (must be in upper bits)
-        const boost::uint32_t data_out = data << (32 - num_bits);
+        const uint32_t data_out = data << (32 - num_bits);
 
         //send data word
         _iface->poke32(SPI_DATA, data_out);
@@ -113,7 +113,7 @@ private:
     wb_iface::sptr _iface;
     const size_t _base;
     const size_t _readback;
-    boost::uint32_t _ctrl_word_cache;
+    uint32_t _ctrl_word_cache;
     bool _shutdown_cache;
     boost::mutex _mutex;
     size_t _div;
diff --git a/host/lib/usrp/cores/time64_core_200.cpp b/host/lib/usrp/cores/time64_core_200.cpp
index 54b60b6ad..b0138400d 100644
--- a/host/lib/usrp/cores/time64_core_200.cpp
+++ b/host/lib/usrp/cores/time64_core_200.cpp
@@ -71,10 +71,10 @@ public:
 
     uhd::time_spec_t get_time_now(void){
         for (size_t i = 0; i < 3; i++){ //special algorithm because we cant read 64 bits synchronously
-            const boost::uint32_t ticks_hi = _iface->peek32(_readback_bases.rb_hi_now);
-            const boost::uint32_t ticks_lo = _iface->peek32(_readback_bases.rb_lo_now);
+            const uint32_t ticks_hi = _iface->peek32(_readback_bases.rb_hi_now);
+            const uint32_t ticks_lo = _iface->peek32(_readback_bases.rb_lo_now);
             if (ticks_hi != _iface->peek32(_readback_bases.rb_hi_now)) continue;
-            const boost::uint64_t ticks = (boost::uint64_t(ticks_hi) << 32) | ticks_lo;
+            const uint64_t ticks = (uint64_t(ticks_hi) << 32) | ticks_lo;
             return time_spec_t::from_ticks(ticks, _tick_rate);
         }
         throw uhd::runtime_error("time64_core_200: get time now timeout");
@@ -82,27 +82,27 @@ public:
 
     uhd::time_spec_t get_time_last_pps(void){
         for (size_t i = 0; i < 3; i++){ //special algorithm because we cant read 64 bits synchronously
-            const boost::uint32_t ticks_hi = _iface->peek32(_readback_bases.rb_hi_pps);
-            const boost::uint32_t ticks_lo = _iface->peek32(_readback_bases.rb_lo_pps);
+            const uint32_t ticks_hi = _iface->peek32(_readback_bases.rb_hi_pps);
+            const uint32_t ticks_lo = _iface->peek32(_readback_bases.rb_lo_pps);
             if (ticks_hi != _iface->peek32(_readback_bases.rb_hi_pps)) continue;
-            const boost::uint64_t ticks = (boost::uint64_t(ticks_hi) << 32) | ticks_lo;
+            const uint64_t ticks = (uint64_t(ticks_hi) << 32) | ticks_lo;
             return time_spec_t::from_ticks(ticks, _tick_rate);
         }
         throw uhd::runtime_error("time64_core_200: get time last pps timeout");
     }
 
     void set_time_now(const uhd::time_spec_t &time){
-        const boost::uint64_t ticks = time.to_ticks(_tick_rate);
-        _iface->poke32(REG_TIME64_TICKS_LO, boost::uint32_t(ticks >> 0));
+        const uint64_t ticks = time.to_ticks(_tick_rate);
+        _iface->poke32(REG_TIME64_TICKS_LO, uint32_t(ticks >> 0));
         _iface->poke32(REG_TIME64_IMM, FLAG_TIME64_LATCH_NOW);
-        _iface->poke32(REG_TIME64_TICKS_HI, boost::uint32_t(ticks >> 32)); //latches all 3
+        _iface->poke32(REG_TIME64_TICKS_HI, uint32_t(ticks >> 32)); //latches all 3
     }
 
     void set_time_next_pps(const uhd::time_spec_t &time){
-        const boost::uint64_t ticks = time.to_ticks(_tick_rate);
-        _iface->poke32(REG_TIME64_TICKS_LO, boost::uint32_t(ticks >> 0));
+        const uint64_t ticks = time.to_ticks(_tick_rate);
+        _iface->poke32(REG_TIME64_TICKS_LO, uint32_t(ticks >> 0));
         _iface->poke32(REG_TIME64_IMM, FLAG_TIME64_LATCH_NEXT_PPS);
-        _iface->poke32(REG_TIME64_TICKS_HI, boost::uint32_t(ticks >> 32)); //latches all 3
+        _iface->poke32(REG_TIME64_TICKS_HI, uint32_t(ticks >> 32)); //latches all 3
     }
 
     void set_time_source(const std::string &source){
diff --git a/host/lib/usrp/cores/time_core_3000.cpp b/host/lib/usrp/cores/time_core_3000.cpp
index 45b1750d2..25142b9fe 100644
--- a/host/lib/usrp/cores/time_core_3000.cpp
+++ b/host/lib/usrp/cores/time_core_3000.cpp
@@ -82,37 +82,37 @@ struct time_core_3000_impl : time_core_3000
 
     uhd::time_spec_t get_time_now(void)
     {
-        const boost::uint64_t ticks = _iface->peek64(_readback_bases.rb_now);
+        const uint64_t ticks = _iface->peek64(_readback_bases.rb_now);
         return time_spec_t::from_ticks(ticks, _tick_rate);
     }
 
     uhd::time_spec_t get_time_last_pps(void)
     {
-        const boost::uint64_t ticks = _iface->peek64(_readback_bases.rb_pps);
+        const uint64_t ticks = _iface->peek64(_readback_bases.rb_pps);
         return time_spec_t::from_ticks(ticks, _tick_rate);
     }
 
     void set_time_now(const uhd::time_spec_t &time)
     {
-        const boost::uint64_t ticks = time.to_ticks(_tick_rate);
-        _iface->poke32(REG_TIME_HI, boost::uint32_t(ticks >> 32));
-        _iface->poke32(REG_TIME_LO, boost::uint32_t(ticks >> 0));
+        const uint64_t ticks = time.to_ticks(_tick_rate);
+        _iface->poke32(REG_TIME_HI, uint32_t(ticks >> 32));
+        _iface->poke32(REG_TIME_LO, uint32_t(ticks >> 0));
         _iface->poke32(REG_TIME_CTRL, CTRL_LATCH_TIME_NOW);
     }
 
     void set_time_sync(const uhd::time_spec_t &time)
     {
-        const boost::uint64_t ticks = time.to_ticks(_tick_rate);
-        _iface->poke32(REG_TIME_HI, boost::uint32_t(ticks >> 32));
-        _iface->poke32(REG_TIME_LO, boost::uint32_t(ticks >> 0));
+        const uint64_t ticks = time.to_ticks(_tick_rate);
+        _iface->poke32(REG_TIME_HI, uint32_t(ticks >> 32));
+        _iface->poke32(REG_TIME_LO, uint32_t(ticks >> 0));
         _iface->poke32(REG_TIME_CTRL, CTRL_LATCH_TIME_SYNC);
     }
 
     void set_time_next_pps(const uhd::time_spec_t &time)
     {
-        const boost::uint64_t ticks = time.to_ticks(_tick_rate);
-        _iface->poke32(REG_TIME_HI, boost::uint32_t(ticks >> 32));
-        _iface->poke32(REG_TIME_LO, boost::uint32_t(ticks >> 0));
+        const uint64_t ticks = time.to_ticks(_tick_rate);
+        _iface->poke32(REG_TIME_HI, uint32_t(ticks >> 32));
+        _iface->poke32(REG_TIME_LO, uint32_t(ticks >> 0));
         _iface->poke32(REG_TIME_CTRL, CTRL_LATCH_TIME_PPS);
     }
 
diff --git a/host/lib/usrp/cores/tx_dsp_core_200.cpp b/host/lib/usrp/cores/tx_dsp_core_200.cpp
index 4c456a10d..4e1743ee1 100644
--- a/host/lib/usrp/cores/tx_dsp_core_200.cpp
+++ b/host/lib/usrp/cores/tx_dsp_core_200.cpp
@@ -60,7 +60,7 @@ public:
     tx_dsp_core_200_impl(
         wb_iface::sptr iface,
         const size_t dsp_base, const size_t ctrl_base,
-        const boost::uint32_t sid
+        const uint32_t sid
     ):
         _iface(iface), _dsp_base(dsp_base), _ctrl_base(ctrl_base), _sid(sid)
     {
@@ -98,8 +98,8 @@ public:
     }
 
     void set_link_rate(const double rate){
-        //_link_rate = rate/sizeof(boost::uint32_t); //in samps/s
-        _link_rate = rate/sizeof(boost::uint16_t); //in samps/s (allows for 8sc)
+        //_link_rate = rate/sizeof(uint32_t); //in samps/s
+        _link_rate = rate/sizeof(uint16_t); //in samps/s (allows for 8sc)
     }
 
     uhd::meta_range_t get_host_rates(void){
@@ -154,7 +154,7 @@ public:
     void update_scalar(void){
         const double factor = 1.0 + std::max(ceil_log2(_scaling_adjustment), 0.0);
         const double target_scalar = (1 << 17)*_scaling_adjustment/_dsp_extra_scaling/factor;
-        const boost::int32_t actual_scalar = boost::math::iround(target_scalar);
+        const int32_t actual_scalar = boost::math::iround(target_scalar);
         _fxpt_scalar_correction = target_scalar/actual_scalar*factor; //should be small
         _iface->poke32(REG_DSP_TX_SCALE_IQ, actual_scalar);
     }
@@ -167,7 +167,7 @@ public:
         double actual_freq;
         int32_t freq_word;
         get_freq_and_freq_word(requested_freq, _tick_rate, actual_freq, freq_word);
-        _iface->poke32(REG_DSP_TX_FREQ, boost::uint32_t(freq_word));
+        _iface->poke32(REG_DSP_TX_FREQ, uint32_t(freq_word));
         return actual_freq;
     }
 
@@ -214,9 +214,9 @@ private:
     const size_t _dsp_base, _ctrl_base;
     double _tick_rate, _link_rate;
     double _scaling_adjustment, _dsp_extra_scaling, _host_extra_scaling, _fxpt_scalar_correction;
-    const boost::uint32_t _sid;
+    const uint32_t _sid;
 };
 
-tx_dsp_core_200::sptr tx_dsp_core_200::make(wb_iface::sptr iface, const size_t dsp_base, const size_t ctrl_base, const boost::uint32_t sid){
+tx_dsp_core_200::sptr tx_dsp_core_200::make(wb_iface::sptr iface, const size_t dsp_base, const size_t ctrl_base, const uint32_t sid){
     return sptr(new tx_dsp_core_200_impl(iface, dsp_base, ctrl_base, sid));
 }
diff --git a/host/lib/usrp/cores/tx_dsp_core_200.hpp b/host/lib/usrp/cores/tx_dsp_core_200.hpp
index f0475c579..02faad587 100644
--- a/host/lib/usrp/cores/tx_dsp_core_200.hpp
+++ b/host/lib/usrp/cores/tx_dsp_core_200.hpp
@@ -34,7 +34,7 @@ public:
     static sptr make(
         uhd::wb_iface::sptr iface,
         const size_t dsp_base, const size_t ctrl_base,
-        const boost::uint32_t sid
+        const uint32_t sid
     );
 
     virtual void clear(void) = 0;
diff --git a/host/lib/usrp/cores/tx_dsp_core_3000.cpp b/host/lib/usrp/cores/tx_dsp_core_3000.cpp
index 3889bbdc4..67ff418b3 100644
--- a/host/lib/usrp/cores/tx_dsp_core_3000.cpp
+++ b/host/lib/usrp/cores/tx_dsp_core_3000.cpp
@@ -66,8 +66,8 @@ public:
     }
 
     void set_link_rate(const double rate){
-        //_link_rate = rate/sizeof(boost::uint32_t); //in samps/s
-        _link_rate = rate/sizeof(boost::uint16_t); //in samps/s (allows for 8sc)
+        //_link_rate = rate/sizeof(uint32_t); //in samps/s
+        _link_rate = rate/sizeof(uint16_t); //in samps/s (allows for 8sc)
     }
 
     uhd::meta_range_t get_host_rates(void){
@@ -127,7 +127,7 @@ public:
   // Further more factor in OTW format which adds further gain factor to weight output samples correctly.
     void update_scalar(void){
         const double target_scalar = (1 << 16)*_scaling_adjustment/_dsp_extra_scaling;
-        const boost::int32_t actual_scalar = boost::math::iround(target_scalar);
+        const int32_t actual_scalar = boost::math::iround(target_scalar);
         _fxpt_scalar_correction = target_scalar/actual_scalar; //should be small
         _iface->poke32(REG_DSP_TX_SCALE_IQ, actual_scalar);
     }
@@ -140,7 +140,7 @@ public:
         double actual_freq;
         int32_t freq_word;
         get_freq_and_freq_word(requested_freq, _tick_rate, actual_freq, freq_word);
-        _iface->poke32(REG_DSP_TX_FREQ, boost::uint32_t(freq_word));
+        _iface->poke32(REG_DSP_TX_FREQ, uint32_t(freq_word));
         return actual_freq;
     }
 
diff --git a/host/lib/usrp/cores/tx_frontend_core_200.cpp b/host/lib/usrp/cores/tx_frontend_core_200.cpp
index be4f77f39..241f98d07 100644
--- a/host/lib/usrp/cores/tx_frontend_core_200.cpp
+++ b/host/lib/usrp/cores/tx_frontend_core_200.cpp
@@ -33,8 +33,8 @@ using namespace uhd;
 const std::complex<double> tx_frontend_core_200::DEFAULT_DC_OFFSET_VALUE = std::complex<double>(0.0, 0.0);
 const std::complex<double> tx_frontend_core_200::DEFAULT_IQ_BALANCE_VALUE = std::complex<double>(0.0, 0.0);
 
-static boost::uint32_t fs_to_bits(const double num, const size_t bits){
-    return boost::int32_t(boost::math::round(num * (1 << (bits-1))));
+static uint32_t fs_to_bits(const double num, const size_t bits){
+    return int32_t(boost::math::round(num * (1 << (bits-1))));
 }
 
 tx_frontend_core_200::~tx_frontend_core_200(void){
@@ -50,7 +50,7 @@ public:
     }
 
     void set_mux(const std::string &mode){
-        static const uhd::dict<std::string, boost::uint32_t> mode_to_mux = boost::assign::map_list_of
+        static const uhd::dict<std::string, uint32_t> mode_to_mux = boost::assign::map_list_of
             ("IQ", (0x1 << 4) | (0x0 << 0)) //DAC0Q=DUC0Q, DAC0I=DUC0I
             ("QI", (0x0 << 4) | (0x1 << 0)) //DAC0Q=DUC0I, DAC0I=DUC0Q
             ("I",  (0xf << 4) | (0x0 << 0)) //DAC0Q=ZERO,  DAC0I=DUC0I
@@ -61,8 +61,8 @@ public:
 
     std::complex<double> set_dc_offset(const std::complex<double> &off){
         static const double scaler = double(1ul << 23);
-        const boost::int32_t i_dc_off = boost::math::iround(off.real()*scaler);
-        const boost::int32_t q_dc_off = boost::math::iround(off.imag()*scaler);
+        const int32_t i_dc_off = boost::math::iround(off.real()*scaler);
+        const int32_t q_dc_off = boost::math::iround(off.imag()*scaler);
 
         _iface->poke32(REG_TX_FE_DC_OFFSET_I, i_dc_off);
         _iface->poke32(REG_TX_FE_DC_OFFSET_Q, q_dc_off);
diff --git a/host/lib/usrp/cores/user_settings_core_200.hpp b/host/lib/usrp/cores/user_settings_core_200.hpp
index a8efeed38..9e985c23b 100644
--- a/host/lib/usrp/cores/user_settings_core_200.hpp
+++ b/host/lib/usrp/cores/user_settings_core_200.hpp
@@ -26,7 +26,7 @@
 class user_settings_core_200 : boost::noncopyable{
 public:
     typedef boost::shared_ptr<user_settings_core_200> sptr;
-    typedef std::pair<boost::uint8_t, boost::uint32_t> user_reg_t;
+    typedef std::pair<uint8_t, uint32_t> user_reg_t;
 
     virtual ~user_settings_core_200(void) = 0;
 
diff --git a/host/lib/usrp/cores/user_settings_core_3000.cpp b/host/lib/usrp/cores/user_settings_core_3000.cpp
index 549264f57..22d27cfbb 100644
--- a/host/lib/usrp/cores/user_settings_core_3000.cpp
+++ b/host/lib/usrp/cores/user_settings_core_3000.cpp
@@ -34,40 +34,40 @@ public:
     {
     }
 
-    void poke64(const wb_addr_type offset, const boost::uint64_t value)
+    void poke64(const wb_addr_type offset, const uint64_t value)
     {
-        if (offset % sizeof(boost::uint64_t) != 0) throw uhd::value_error("poke64: Incorrect address alignment");
-        poke32(offset, static_cast<boost::uint32_t>(value));
-        poke32(offset + 4, static_cast<boost::uint32_t>(value >> 32));
+        if (offset % sizeof(uint64_t) != 0) throw uhd::value_error("poke64: Incorrect address alignment");
+        poke32(offset, static_cast<uint32_t>(value));
+        poke32(offset + 4, static_cast<uint32_t>(value >> 32));
     }
 
-    boost::uint64_t peek64(const wb_addr_type offset)
+    uint64_t peek64(const wb_addr_type offset)
     {
-        if (offset % sizeof(boost::uint64_t) != 0) throw uhd::value_error("peek64: Incorrect address alignment");
+        if (offset % sizeof(uint64_t) != 0) throw uhd::value_error("peek64: Incorrect address alignment");
 
         boost::unique_lock<boost::mutex> lock(_mutex);
         _iface->poke32(REG_USER_RB_ADDR, offset >> 3);  //Translate byte offset to 64-bit offset
         return _iface->peek64(_rb_reg_addr);
     }
 
-    void poke32(const wb_addr_type offset, const boost::uint32_t value)
+    void poke32(const wb_addr_type offset, const uint32_t value)
     {
-        if (offset % sizeof(boost::uint32_t) != 0) throw uhd::value_error("poke32: Incorrect address alignment");
+        if (offset % sizeof(uint32_t) != 0) throw uhd::value_error("poke32: Incorrect address alignment");
 
         boost::unique_lock<boost::mutex> lock(_mutex);
         _iface->poke32(REG_USER_SR_ADDR, offset >> 2);   //Translate byte offset to 64-bit offset
         _iface->poke32(REG_USER_SR_DATA, value);
     }
 
-    boost::uint32_t peek32(const wb_addr_type offset)
+    uint32_t peek32(const wb_addr_type offset)
     {
-        if (offset % sizeof(boost::uint32_t) != 0) throw uhd::value_error("peek32: Incorrect address alignment");
+        if (offset % sizeof(uint32_t) != 0) throw uhd::value_error("peek32: Incorrect address alignment");
 
-        boost::uint64_t value = peek64((offset >> 3) << 3);
+        uint64_t value = peek64((offset >> 3) << 3);
         if ((offset & 0x7) == 0) {
-            return static_cast<boost::uint32_t>(value);
+            return static_cast<uint32_t>(value);
         } else {
-            return static_cast<boost::uint32_t>(value >> 32);
+            return static_cast<uint32_t>(value >> 32);
         }
     }