| Commit message (Collapse) | Author | Age | Files | Lines |
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Auto-generated IC Register Maps (e.g. magnesium_cpld_regs,
rhodium_cpld_regs, etc.) now provide getter methods for all attributes.
This gives access to the save state information for the device.
Signed-off-by: mattprost <matt.prost@ni.com>
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For certain frequencies, the LMX2592 will sporadically fail to lock upon
the very first tune. When this happens, subsequent tunes (even to the same
frequency) do lock. This issue seems to be resolved by programming the FCAL
adjustment register fields (FCAL_LPFD_ADJ/FCAL_HPFD_ADJ) as described in
the LMX2592 datasheet. These fields adjust the FCAL calibration speed to
better accomodate PFD frequencies below 20MHz or above 100MHz.
This patch also fixes a few name typos in the register map that were
directly in the scope of this change.
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Closes: https://github.com/EttusResearch/uhd/issues/478
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Co-authored-by: Lars Amsel <lars.amsel@ni.com>
Co-authored-by: Michael Auchter <michael.auchter@ni.com>
Co-authored-by: Martin Braun <martin.braun@ettus.com>
Co-authored-by: Paul Butler <paul.butler@ni.com>
Co-authored-by: Cristina Fuentes <cristina.fuentes-curiel@ni.com>
Co-authored-by: Humberto Jimenez <humberto.jimenez@ni.com>
Co-authored-by: Virendra Kakade <virendra.kakade@ni.com>
Co-authored-by: Lane Kolbly <lane.kolbly@ni.com>
Co-authored-by: Max Köhler <max.koehler@ni.com>
Co-authored-by: Andrew Lynch <andrew.lynch@ni.com>
Co-authored-by: Grant Meyerhoff <grant.meyerhoff@ni.com>
Co-authored-by: Ciro Nishiguchi <ciro.nishiguchi@ni.com>
Co-authored-by: Thomas Vogel <thomas.vogel@ni.com>
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These registers aren't used anywhere in UHD.
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Add SPCC reg map for reference and testing.
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This lets you declare registers like this:
REG_NAME[ARRAY_LEN] ADDRESS[BITS] DEFAULT ENUMS
The reg object will now carray REG_NAME as an array. So, you can do
regs.REG_NAME[0] = VALUE;
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Add COMMON_PY_TMPL which is identical to COMMON_TMPL in functionality
but generates Python syntax rather than C++ header syntax. Modify the
generate function which will now determine if the destination regmap
file is a Python file or not and will use the appropriate template.
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Updated Register values for ADF5356:
R2) Expand Frac2 to a 28-bit value for ADF5356
R6) Use negative bleed current for improved spurious performance
R7) Set Fractional-N Lock Detect Precision to 12.0 ns because of bleed
currents
R8) Use magic number for reserved bits
R9) Fix VCO Band Division calculation for ADF5356
RD) Expand Frac2 to a 28-bit value for ADF5356
Signed-off-by: mattprost <matt.prost@ni.com>
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Letting garbage collection close the file works when using CPython, but
it fails with PyPy which uses a different garbage collection strategy.
This makes sure that the file is closed by using a file context manager.
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This changes two things in all applicable files:
- Remove imports from __future__
- Change default shebangs from /usr/bin/env python to /usr/bin/env
python3
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- This change improves spur performance for the Rev C TwinRX daughterboard
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Updating all SPDX license identifiers to include "-or-later"
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Also updates our coding style file.
Ancient CMake versions required upper-case commands. Later command
names became case-insensitive. Now the preferred style is lower-case.
Run the following shell code (with GNU compliant sed):
cmake --help-command-list | grep -v "cmake version" | while read c; do
echo 's/\b'"$(echo $c | tr '[:lower:]' '[:upper:]')"'\(\s*\)(/'"$c"'\1(/g'
done > convert.sed \
&& git ls-files -z -- bootstrap '*.cmake' '*.cmake.in' \
'*CMakeLists.txt' | xargs -0 gsed -i -f convert.sed && rm convert.sed
(Make sure the backslashes don't get mangled!)
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Co-authored-by: Humberto Jimenez <humberto.jimenez@ni.com>
Co-authored-by: Alex Williams <alex.williams@ni.com>
Co-authored-by: Derek Kozel <derek.kozel@ni.com>
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All copyright is now attributed to "Ettus Research, a National
Instruments company".
SPDX headers were also updated to latest version 3.0.
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Without turning on tx power amplifer when being idle, the TX settling time is
100ms. Turning these power amplifiers on "all time" results in tx settling time
around 140us.
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- Fixed incorrect register address for channel 1 lowband mixer select
- Fixed enabling of bypass path
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- Creates mpm/ subdirectory
- First pass at hardware daemon/MPM
- New code for LMK04828, AD9371
- spidev integration
Contributions by:
Martin Braun <martin.braun@ettus.com>
Derek Kozel <derek.kozel@ettus.com>
Mark Meserve <mark.meserve@ni.com>
Andrej Rode <andrej.rode@ettus.com>
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ADF5355 and ADF5356 support merged into adf535x class
Default register values moved into regmap
Reviewed-By: Martin Braun <martin.braun@ettus.com>
Reviewed-By: Ashish Chaudhari <ashish@ettus.com>
Reviewed-By: Mark Meserve <mark.meserve@ni.com>
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types)
- Also removes all references to boost/cstdint.hpp and replaces it with
stdint.h (The 'correct' replacement would be <cstdint>, but not all of our
compilers support that).
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- Also added a template specialization for enabling the VAS_DLY bit locations based on VAS_TEMP setting (aka retune)
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- Added regmap
- Added controller class
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- This function allows delaying divider pairs using the digital and analog
delay blocks in the LMK divider
- ctrl object caches delay for later retrieval
- Minor fixes to LMK regmap
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* The UNSET command didn't exist back then, but using SET with no value does the same thing
* CMake 2.6 doesn't like nested parantheses in IF statements, so tweak IF/ELSE statements
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These register addresses should be in hex.
Fortunately, they are not set in the code,
so the typo did not break anything in UHD.
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Conflicts:
host/lib/usrp/usrp2/mboard_impl.cpp
host/lib/usrp/usrp2/usrp2_impl.cpp
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added vco calibration routine and readback to check for calibrated
changed the counters/dividers calculation to be event driven and more
mathematically calculated.
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