| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | fpga: tools: Put SIM_SRCS at end of compile order | Wade Fife | 2021-06-17 | 1 | -1/+1 |
| * | fpga: tools: Add modelsim.ini to ModelSim calls | Wade Fife | 2021-06-17 | 1 | -3/+10 |
| * | fpga: tools: Highlight suppressible errors from vlint | Wade Fife | 2020-06-29 | 1 | -1/+1 |
| * | fpga: tools: Fix ModelSim return status | Wade Fife | 2020-06-18 | 1 | -3/+6 |
| * | fpga: tools: Improve native ModelSim support | Wade Fife | 2020-05-26 | 1 | -0/+148 |
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| Ettus' UHD Repository |
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