uhd - Ettus' UHD Repository

	Commit message (Expand)	Author	Age	Files	Lines
*	fpga: Remove noc_shell_regs.vh and sim_rfnoc_lib.svh	Martin Braun	2022-01-25	2	-1030/+0
*	fpga: sim: Add PkgComplex, PkgMath, and PkgRandom	Wade Fife	2021-08-08	4	-0/+544
*	fpga: sim: Check for empty packet in clear_unused_bytes	Wade Fife	2021-06-17	1	-0/+4
*	fpga: sim: Add slave_idle() to PkgAxiStreamBfm.sv	Wade Fife	2021-06-10	1	-0/+4
*	fpga: lib: Add PHASE parameter to sim_clk_gen	Wade Fife	2021-06-03	1	-1/+3
*	fpga: sim: Fix stream command and status models	Wade Fife	2020-08-31	1	-9/+9
*	fpga: sim: Update PkgEthernet	Andrew Moch	2020-07-31	1	-57/+91
*	fpga: sim: Fix AxiLiteBfm	Andrew Moch	2020-07-31	1	-3/+3
*	fpga: lib: Add synthesizable AXI4-Stream SV components	Andrew Moch	2020-06-25	4	-78/+990
*	fpga: lib: Add interface and model for AXI4-Lite	Andrew Moch	2020-06-24	2	-1/+750
*	fpga: rfnoc: Add support for 512-bit CHDR widths	Andrew Moch	2020-06-18	3	-169/+210
*	fpga: sim: Add packet_info_equal function	Wade Fife	2020-05-28	3	-1/+15
*	fpga: sim: Don't affect packet arguments in chdr_to_axis	Wade Fife	2020-05-04	1	-4/+4
*	fpga: sim: Fix get_slave_data_bfm method	Wade Fife	2020-05-04	1	-1/+1
*	fpga: sim: Export return types in PkgRfnocBlockCtrlBfm	Wade Fife	2020-05-04	1	-0/+2
*	fpga: sim: Export ChdrPacket in PkgRfnoBlockCtrlBfm	Wade Fife	2020-04-14	1	-0/+1
*	sim: Rename class typedefs	Wade Fife	2020-03-09	4	-72/+72
*	sim: Add ChdrIfaceBfm test	Wade Fife	2020-03-09	5	-5/+675
*	sim: Add item support to RFNoC simulation	Wade Fife	2020-03-09	2	-34/+414
*	sim: Parameterize chdr_word_t data type	Wade Fife	2020-03-09	8	-208/+381
*	sim: Split PkgRfnocBlockCtrlBfm into separate packages	Wade Fife	2020-03-09	5	-400/+418
*	Merge FPGA repository back into UHD repository	Martin Braun	2020-01-28	22	-0/+6222
*	Removed copy of FPGA source files.	Martin Braun	2014-10-07	27	-2901/+0
*	Pushing the bulk of UHD-3.7.0 code.	Ben Hilburn	2014-02-14	27	-0/+2901