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path: root/fpga/usrp2/opencores/spi/rtl/verilog/spi_defines.v
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* Removed copy of FPGA source files.Martin Braun2014-10-071-159/+0
* fpga: performed a forceful checkout of fpga to overwrite with current fpga codeJosh Blum2010-11-231-5/+5
* moved usrp1 and usrp2 fpga dirs into fpga subdirectoryJosh Blum2010-04-151-0/+159