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-rw-r--r--fpga/usrp3/lib/xge/rtl/include/CRC32_D64.v266
-rw-r--r--fpga/usrp3/lib/xge/rtl/include/CRC32_D8.v101
-rw-r--r--fpga/usrp3/lib/xge/rtl/include/defines.v125
-rw-r--r--fpga/usrp3/lib/xge/rtl/include/timescale.v1
-rw-r--r--fpga/usrp3/lib/xge/rtl/include/utils.v71
5 files changed, 0 insertions, 564 deletions
diff --git a/fpga/usrp3/lib/xge/rtl/include/CRC32_D64.v b/fpga/usrp3/lib/xge/rtl/include/CRC32_D64.v
deleted file mode 100644
index f13f85e1f..000000000
--- a/fpga/usrp3/lib/xge/rtl/include/CRC32_D64.v
+++ /dev/null
@@ -1,266 +0,0 @@
-///////////////////////////////////////////////////////////////////////
-// File: CRC32_D64.v
-// Date: Fri Feb 8 19:30:02 2008
-//
-// Copyright (C) 1999-2003 Easics NV.
-// This source file may be used and distributed without restriction
-// provided that this copyright statement is not removed from the file
-// and that any derivative work contains the original copyright notice
-// and the associated disclaimer.
-//
-// THIS SOURCE FILE IS PROVIDED "AS IS" AND WITHOUT ANY EXPRESS
-// OR IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
-// WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
-//
-// Purpose: Verilog module containing a synthesizable CRC function
-// * polynomial: (0 1 2 4 5 7 8 10 11 12 16 22 23 26 32)
-// * data width: 64
-//
-// Info: tools@easics.be
-// http://www.easics.com
-///////////////////////////////////////////////////////////////////////
-
-
-//module CRC32_D64;
-
- // polynomial: (0 1 2 4 5 7 8 10 11 12 16 22 23 26 32)
- // data width: 64
- // convention: the first serial data bit is D[63]
- function [31:0] nextCRC32_D64;
-
- input [63:0] Data;
- input [31:0] CRC;
-
- reg [63:0] D;
- reg [31:0] C;
- reg [31:0] NewCRC;
-
- begin
-
- D = Data;
- C = CRC;
-
- NewCRC[0] = D[63] ^ D[61] ^ D[60] ^ D[58] ^ D[55] ^ D[54] ^ D[53] ^
- D[50] ^ D[48] ^ D[47] ^ D[45] ^ D[44] ^ D[37] ^ D[34] ^
- D[32] ^ D[31] ^ D[30] ^ D[29] ^ D[28] ^ D[26] ^ D[25] ^
- D[24] ^ D[16] ^ D[12] ^ D[10] ^ D[9] ^ D[6] ^ D[0] ^
- C[0] ^ C[2] ^ C[5] ^ C[12] ^ C[13] ^ C[15] ^ C[16] ^
- C[18] ^ C[21] ^ C[22] ^ C[23] ^ C[26] ^ C[28] ^ C[29] ^
- C[31];
- NewCRC[1] = D[63] ^ D[62] ^ D[60] ^ D[59] ^ D[58] ^ D[56] ^ D[53] ^
- D[51] ^ D[50] ^ D[49] ^ D[47] ^ D[46] ^ D[44] ^ D[38] ^
- D[37] ^ D[35] ^ D[34] ^ D[33] ^ D[28] ^ D[27] ^ D[24] ^
- D[17] ^ D[16] ^ D[13] ^ D[12] ^ D[11] ^ D[9] ^ D[7] ^
- D[6] ^ D[1] ^ D[0] ^ C[1] ^ C[2] ^ C[3] ^ C[5] ^ C[6] ^
- C[12] ^ C[14] ^ C[15] ^ C[17] ^ C[18] ^ C[19] ^ C[21] ^
- C[24] ^ C[26] ^ C[27] ^ C[28] ^ C[30] ^ C[31];
- NewCRC[2] = D[59] ^ D[58] ^ D[57] ^ D[55] ^ D[53] ^ D[52] ^ D[51] ^
- D[44] ^ D[39] ^ D[38] ^ D[37] ^ D[36] ^ D[35] ^ D[32] ^
- D[31] ^ D[30] ^ D[26] ^ D[24] ^ D[18] ^ D[17] ^ D[16] ^
- D[14] ^ D[13] ^ D[9] ^ D[8] ^ D[7] ^ D[6] ^ D[2] ^
- D[1] ^ D[0] ^ C[0] ^ C[3] ^ C[4] ^ C[5] ^ C[6] ^ C[7] ^
- C[12] ^ C[19] ^ C[20] ^ C[21] ^ C[23] ^ C[25] ^ C[26] ^
- C[27];
- NewCRC[3] = D[60] ^ D[59] ^ D[58] ^ D[56] ^ D[54] ^ D[53] ^ D[52] ^
- D[45] ^ D[40] ^ D[39] ^ D[38] ^ D[37] ^ D[36] ^ D[33] ^
- D[32] ^ D[31] ^ D[27] ^ D[25] ^ D[19] ^ D[18] ^ D[17] ^
- D[15] ^ D[14] ^ D[10] ^ D[9] ^ D[8] ^ D[7] ^ D[3] ^
- D[2] ^ D[1] ^ C[0] ^ C[1] ^ C[4] ^ C[5] ^ C[6] ^ C[7] ^
- C[8] ^ C[13] ^ C[20] ^ C[21] ^ C[22] ^ C[24] ^ C[26] ^
- C[27] ^ C[28];
- NewCRC[4] = D[63] ^ D[59] ^ D[58] ^ D[57] ^ D[50] ^ D[48] ^ D[47] ^
- D[46] ^ D[45] ^ D[44] ^ D[41] ^ D[40] ^ D[39] ^ D[38] ^
- D[33] ^ D[31] ^ D[30] ^ D[29] ^ D[25] ^ D[24] ^ D[20] ^
- D[19] ^ D[18] ^ D[15] ^ D[12] ^ D[11] ^ D[8] ^ D[6] ^
- D[4] ^ D[3] ^ D[2] ^ D[0] ^ C[1] ^ C[6] ^ C[7] ^ C[8] ^
- C[9] ^ C[12] ^ C[13] ^ C[14] ^ C[15] ^ C[16] ^ C[18] ^
- C[25] ^ C[26] ^ C[27] ^ C[31];
- NewCRC[5] = D[63] ^ D[61] ^ D[59] ^ D[55] ^ D[54] ^ D[53] ^ D[51] ^
- D[50] ^ D[49] ^ D[46] ^ D[44] ^ D[42] ^ D[41] ^ D[40] ^
- D[39] ^ D[37] ^ D[29] ^ D[28] ^ D[24] ^ D[21] ^ D[20] ^
- D[19] ^ D[13] ^ D[10] ^ D[7] ^ D[6] ^ D[5] ^ D[4] ^
- D[3] ^ D[1] ^ D[0] ^ C[5] ^ C[7] ^ C[8] ^ C[9] ^ C[10] ^
- C[12] ^ C[14] ^ C[17] ^ C[18] ^ C[19] ^ C[21] ^ C[22] ^
- C[23] ^ C[27] ^ C[29] ^ C[31];
- NewCRC[6] = D[62] ^ D[60] ^ D[56] ^ D[55] ^ D[54] ^ D[52] ^ D[51] ^
- D[50] ^ D[47] ^ D[45] ^ D[43] ^ D[42] ^ D[41] ^ D[40] ^
- D[38] ^ D[30] ^ D[29] ^ D[25] ^ D[22] ^ D[21] ^ D[20] ^
- D[14] ^ D[11] ^ D[8] ^ D[7] ^ D[6] ^ D[5] ^ D[4] ^
- D[2] ^ D[1] ^ C[6] ^ C[8] ^ C[9] ^ C[10] ^ C[11] ^
- C[13] ^ C[15] ^ C[18] ^ C[19] ^ C[20] ^ C[22] ^ C[23] ^
- C[24] ^ C[28] ^ C[30];
- NewCRC[7] = D[60] ^ D[58] ^ D[57] ^ D[56] ^ D[54] ^ D[52] ^ D[51] ^
- D[50] ^ D[47] ^ D[46] ^ D[45] ^ D[43] ^ D[42] ^ D[41] ^
- D[39] ^ D[37] ^ D[34] ^ D[32] ^ D[29] ^ D[28] ^ D[25] ^
- D[24] ^ D[23] ^ D[22] ^ D[21] ^ D[16] ^ D[15] ^ D[10] ^
- D[8] ^ D[7] ^ D[5] ^ D[3] ^ D[2] ^ D[0] ^ C[0] ^ C[2] ^
- C[5] ^ C[7] ^ C[9] ^ C[10] ^ C[11] ^ C[13] ^ C[14] ^
- C[15] ^ C[18] ^ C[19] ^ C[20] ^ C[22] ^ C[24] ^ C[25] ^
- C[26] ^ C[28];
- NewCRC[8] = D[63] ^ D[60] ^ D[59] ^ D[57] ^ D[54] ^ D[52] ^ D[51] ^
- D[50] ^ D[46] ^ D[45] ^ D[43] ^ D[42] ^ D[40] ^ D[38] ^
- D[37] ^ D[35] ^ D[34] ^ D[33] ^ D[32] ^ D[31] ^ D[28] ^
- D[23] ^ D[22] ^ D[17] ^ D[12] ^ D[11] ^ D[10] ^ D[8] ^
- D[4] ^ D[3] ^ D[1] ^ D[0] ^ C[0] ^ C[1] ^ C[2] ^ C[3] ^
- C[5] ^ C[6] ^ C[8] ^ C[10] ^ C[11] ^ C[13] ^ C[14] ^
- C[18] ^ C[19] ^ C[20] ^ C[22] ^ C[25] ^ C[27] ^ C[28] ^
- C[31];
- NewCRC[9] = D[61] ^ D[60] ^ D[58] ^ D[55] ^ D[53] ^ D[52] ^ D[51] ^
- D[47] ^ D[46] ^ D[44] ^ D[43] ^ D[41] ^ D[39] ^ D[38] ^
- D[36] ^ D[35] ^ D[34] ^ D[33] ^ D[32] ^ D[29] ^ D[24] ^
- D[23] ^ D[18] ^ D[13] ^ D[12] ^ D[11] ^ D[9] ^ D[5] ^
- D[4] ^ D[2] ^ D[1] ^ C[0] ^ C[1] ^ C[2] ^ C[3] ^ C[4] ^
- C[6] ^ C[7] ^ C[9] ^ C[11] ^ C[12] ^ C[14] ^ C[15] ^
- C[19] ^ C[20] ^ C[21] ^ C[23] ^ C[26] ^ C[28] ^ C[29];
- NewCRC[10] = D[63] ^ D[62] ^ D[60] ^ D[59] ^ D[58] ^ D[56] ^ D[55] ^
- D[52] ^ D[50] ^ D[42] ^ D[40] ^ D[39] ^ D[36] ^ D[35] ^
- D[33] ^ D[32] ^ D[31] ^ D[29] ^ D[28] ^ D[26] ^ D[19] ^
- D[16] ^ D[14] ^ D[13] ^ D[9] ^ D[5] ^ D[3] ^ D[2] ^
- D[0] ^ C[0] ^ C[1] ^ C[3] ^ C[4] ^ C[7] ^ C[8] ^ C[10] ^
- C[18] ^ C[20] ^ C[23] ^ C[24] ^ C[26] ^ C[27] ^ C[28] ^
- C[30] ^ C[31];
- NewCRC[11] = D[59] ^ D[58] ^ D[57] ^ D[56] ^ D[55] ^ D[54] ^ D[51] ^
- D[50] ^ D[48] ^ D[47] ^ D[45] ^ D[44] ^ D[43] ^ D[41] ^
- D[40] ^ D[36] ^ D[33] ^ D[31] ^ D[28] ^ D[27] ^ D[26] ^
- D[25] ^ D[24] ^ D[20] ^ D[17] ^ D[16] ^ D[15] ^ D[14] ^
- D[12] ^ D[9] ^ D[4] ^ D[3] ^ D[1] ^ D[0] ^ C[1] ^ C[4] ^
- C[8] ^ C[9] ^ C[11] ^ C[12] ^ C[13] ^ C[15] ^ C[16] ^
- C[18] ^ C[19] ^ C[22] ^ C[23] ^ C[24] ^ C[25] ^ C[26] ^
- C[27];
- NewCRC[12] = D[63] ^ D[61] ^ D[59] ^ D[57] ^ D[56] ^ D[54] ^ D[53] ^
- D[52] ^ D[51] ^ D[50] ^ D[49] ^ D[47] ^ D[46] ^ D[42] ^
- D[41] ^ D[31] ^ D[30] ^ D[27] ^ D[24] ^ D[21] ^ D[18] ^
- D[17] ^ D[15] ^ D[13] ^ D[12] ^ D[9] ^ D[6] ^ D[5] ^
- D[4] ^ D[2] ^ D[1] ^ D[0] ^ C[9] ^ C[10] ^ C[14] ^
- C[15] ^ C[17] ^ C[18] ^ C[19] ^ C[20] ^ C[21] ^ C[22] ^
- C[24] ^ C[25] ^ C[27] ^ C[29] ^ C[31];
- NewCRC[13] = D[62] ^ D[60] ^ D[58] ^ D[57] ^ D[55] ^ D[54] ^ D[53] ^
- D[52] ^ D[51] ^ D[50] ^ D[48] ^ D[47] ^ D[43] ^ D[42] ^
- D[32] ^ D[31] ^ D[28] ^ D[25] ^ D[22] ^ D[19] ^ D[18] ^
- D[16] ^ D[14] ^ D[13] ^ D[10] ^ D[7] ^ D[6] ^ D[5] ^
- D[3] ^ D[2] ^ D[1] ^ C[0] ^ C[10] ^ C[11] ^ C[15] ^
- C[16] ^ C[18] ^ C[19] ^ C[20] ^ C[21] ^ C[22] ^ C[23] ^
- C[25] ^ C[26] ^ C[28] ^ C[30];
- NewCRC[14] = D[63] ^ D[61] ^ D[59] ^ D[58] ^ D[56] ^ D[55] ^ D[54] ^
- D[53] ^ D[52] ^ D[51] ^ D[49] ^ D[48] ^ D[44] ^ D[43] ^
- D[33] ^ D[32] ^ D[29] ^ D[26] ^ D[23] ^ D[20] ^ D[19] ^
- D[17] ^ D[15] ^ D[14] ^ D[11] ^ D[8] ^ D[7] ^ D[6] ^
- D[4] ^ D[3] ^ D[2] ^ C[0] ^ C[1] ^ C[11] ^ C[12] ^
- C[16] ^ C[17] ^ C[19] ^ C[20] ^ C[21] ^ C[22] ^ C[23] ^
- C[24] ^ C[26] ^ C[27] ^ C[29] ^ C[31];
- NewCRC[15] = D[62] ^ D[60] ^ D[59] ^ D[57] ^ D[56] ^ D[55] ^ D[54] ^
- D[53] ^ D[52] ^ D[50] ^ D[49] ^ D[45] ^ D[44] ^ D[34] ^
- D[33] ^ D[30] ^ D[27] ^ D[24] ^ D[21] ^ D[20] ^ D[18] ^
- D[16] ^ D[15] ^ D[12] ^ D[9] ^ D[8] ^ D[7] ^ D[5] ^
- D[4] ^ D[3] ^ C[1] ^ C[2] ^ C[12] ^ C[13] ^ C[17] ^
- C[18] ^ C[20] ^ C[21] ^ C[22] ^ C[23] ^ C[24] ^ C[25] ^
- C[27] ^ C[28] ^ C[30];
- NewCRC[16] = D[57] ^ D[56] ^ D[51] ^ D[48] ^ D[47] ^ D[46] ^ D[44] ^
- D[37] ^ D[35] ^ D[32] ^ D[30] ^ D[29] ^ D[26] ^ D[24] ^
- D[22] ^ D[21] ^ D[19] ^ D[17] ^ D[13] ^ D[12] ^ D[8] ^
- D[5] ^ D[4] ^ D[0] ^ C[0] ^ C[3] ^ C[5] ^ C[12] ^ C[14] ^
- C[15] ^ C[16] ^ C[19] ^ C[24] ^ C[25];
- NewCRC[17] = D[58] ^ D[57] ^ D[52] ^ D[49] ^ D[48] ^ D[47] ^ D[45] ^
- D[38] ^ D[36] ^ D[33] ^ D[31] ^ D[30] ^ D[27] ^ D[25] ^
- D[23] ^ D[22] ^ D[20] ^ D[18] ^ D[14] ^ D[13] ^ D[9] ^
- D[6] ^ D[5] ^ D[1] ^ C[1] ^ C[4] ^ C[6] ^ C[13] ^ C[15] ^
- C[16] ^ C[17] ^ C[20] ^ C[25] ^ C[26];
- NewCRC[18] = D[59] ^ D[58] ^ D[53] ^ D[50] ^ D[49] ^ D[48] ^ D[46] ^
- D[39] ^ D[37] ^ D[34] ^ D[32] ^ D[31] ^ D[28] ^ D[26] ^
- D[24] ^ D[23] ^ D[21] ^ D[19] ^ D[15] ^ D[14] ^ D[10] ^
- D[7] ^ D[6] ^ D[2] ^ C[0] ^ C[2] ^ C[5] ^ C[7] ^ C[14] ^
- C[16] ^ C[17] ^ C[18] ^ C[21] ^ C[26] ^ C[27];
- NewCRC[19] = D[60] ^ D[59] ^ D[54] ^ D[51] ^ D[50] ^ D[49] ^ D[47] ^
- D[40] ^ D[38] ^ D[35] ^ D[33] ^ D[32] ^ D[29] ^ D[27] ^
- D[25] ^ D[24] ^ D[22] ^ D[20] ^ D[16] ^ D[15] ^ D[11] ^
- D[8] ^ D[7] ^ D[3] ^ C[0] ^ C[1] ^ C[3] ^ C[6] ^ C[8] ^
- C[15] ^ C[17] ^ C[18] ^ C[19] ^ C[22] ^ C[27] ^ C[28];
- NewCRC[20] = D[61] ^ D[60] ^ D[55] ^ D[52] ^ D[51] ^ D[50] ^ D[48] ^
- D[41] ^ D[39] ^ D[36] ^ D[34] ^ D[33] ^ D[30] ^ D[28] ^
- D[26] ^ D[25] ^ D[23] ^ D[21] ^ D[17] ^ D[16] ^ D[12] ^
- D[9] ^ D[8] ^ D[4] ^ C[1] ^ C[2] ^ C[4] ^ C[7] ^ C[9] ^
- C[16] ^ C[18] ^ C[19] ^ C[20] ^ C[23] ^ C[28] ^ C[29];
- NewCRC[21] = D[62] ^ D[61] ^ D[56] ^ D[53] ^ D[52] ^ D[51] ^ D[49] ^
- D[42] ^ D[40] ^ D[37] ^ D[35] ^ D[34] ^ D[31] ^ D[29] ^
- D[27] ^ D[26] ^ D[24] ^ D[22] ^ D[18] ^ D[17] ^ D[13] ^
- D[10] ^ D[9] ^ D[5] ^ C[2] ^ C[3] ^ C[5] ^ C[8] ^ C[10] ^
- C[17] ^ C[19] ^ C[20] ^ C[21] ^ C[24] ^ C[29] ^ C[30];
- NewCRC[22] = D[62] ^ D[61] ^ D[60] ^ D[58] ^ D[57] ^ D[55] ^ D[52] ^
- D[48] ^ D[47] ^ D[45] ^ D[44] ^ D[43] ^ D[41] ^ D[38] ^
- D[37] ^ D[36] ^ D[35] ^ D[34] ^ D[31] ^ D[29] ^ D[27] ^
- D[26] ^ D[24] ^ D[23] ^ D[19] ^ D[18] ^ D[16] ^ D[14] ^
- D[12] ^ D[11] ^ D[9] ^ D[0] ^ C[2] ^ C[3] ^ C[4] ^
- C[5] ^ C[6] ^ C[9] ^ C[11] ^ C[12] ^ C[13] ^ C[15] ^
- C[16] ^ C[20] ^ C[23] ^ C[25] ^ C[26] ^ C[28] ^ C[29] ^
- C[30];
- NewCRC[23] = D[62] ^ D[60] ^ D[59] ^ D[56] ^ D[55] ^ D[54] ^ D[50] ^
- D[49] ^ D[47] ^ D[46] ^ D[42] ^ D[39] ^ D[38] ^ D[36] ^
- D[35] ^ D[34] ^ D[31] ^ D[29] ^ D[27] ^ D[26] ^ D[20] ^
- D[19] ^ D[17] ^ D[16] ^ D[15] ^ D[13] ^ D[9] ^ D[6] ^
- D[1] ^ D[0] ^ C[2] ^ C[3] ^ C[4] ^ C[6] ^ C[7] ^ C[10] ^
- C[14] ^ C[15] ^ C[17] ^ C[18] ^ C[22] ^ C[23] ^ C[24] ^
- C[27] ^ C[28] ^ C[30];
- NewCRC[24] = D[63] ^ D[61] ^ D[60] ^ D[57] ^ D[56] ^ D[55] ^ D[51] ^
- D[50] ^ D[48] ^ D[47] ^ D[43] ^ D[40] ^ D[39] ^ D[37] ^
- D[36] ^ D[35] ^ D[32] ^ D[30] ^ D[28] ^ D[27] ^ D[21] ^
- D[20] ^ D[18] ^ D[17] ^ D[16] ^ D[14] ^ D[10] ^ D[7] ^
- D[2] ^ D[1] ^ C[0] ^ C[3] ^ C[4] ^ C[5] ^ C[7] ^ C[8] ^
- C[11] ^ C[15] ^ C[16] ^ C[18] ^ C[19] ^ C[23] ^ C[24] ^
- C[25] ^ C[28] ^ C[29] ^ C[31];
- NewCRC[25] = D[62] ^ D[61] ^ D[58] ^ D[57] ^ D[56] ^ D[52] ^ D[51] ^
- D[49] ^ D[48] ^ D[44] ^ D[41] ^ D[40] ^ D[38] ^ D[37] ^
- D[36] ^ D[33] ^ D[31] ^ D[29] ^ D[28] ^ D[22] ^ D[21] ^
- D[19] ^ D[18] ^ D[17] ^ D[15] ^ D[11] ^ D[8] ^ D[3] ^
- D[2] ^ C[1] ^ C[4] ^ C[5] ^ C[6] ^ C[8] ^ C[9] ^ C[12] ^
- C[16] ^ C[17] ^ C[19] ^ C[20] ^ C[24] ^ C[25] ^ C[26] ^
- C[29] ^ C[30];
- NewCRC[26] = D[62] ^ D[61] ^ D[60] ^ D[59] ^ D[57] ^ D[55] ^ D[54] ^
- D[52] ^ D[49] ^ D[48] ^ D[47] ^ D[44] ^ D[42] ^ D[41] ^
- D[39] ^ D[38] ^ D[31] ^ D[28] ^ D[26] ^ D[25] ^ D[24] ^
- D[23] ^ D[22] ^ D[20] ^ D[19] ^ D[18] ^ D[10] ^ D[6] ^
- D[4] ^ D[3] ^ D[0] ^ C[6] ^ C[7] ^ C[9] ^ C[10] ^ C[12] ^
- C[15] ^ C[16] ^ C[17] ^ C[20] ^ C[22] ^ C[23] ^ C[25] ^
- C[27] ^ C[28] ^ C[29] ^ C[30];
- NewCRC[27] = D[63] ^ D[62] ^ D[61] ^ D[60] ^ D[58] ^ D[56] ^ D[55] ^
- D[53] ^ D[50] ^ D[49] ^ D[48] ^ D[45] ^ D[43] ^ D[42] ^
- D[40] ^ D[39] ^ D[32] ^ D[29] ^ D[27] ^ D[26] ^ D[25] ^
- D[24] ^ D[23] ^ D[21] ^ D[20] ^ D[19] ^ D[11] ^ D[7] ^
- D[5] ^ D[4] ^ D[1] ^ C[0] ^ C[7] ^ C[8] ^ C[10] ^ C[11] ^
- C[13] ^ C[16] ^ C[17] ^ C[18] ^ C[21] ^ C[23] ^ C[24] ^
- C[26] ^ C[28] ^ C[29] ^ C[30] ^ C[31];
- NewCRC[28] = D[63] ^ D[62] ^ D[61] ^ D[59] ^ D[57] ^ D[56] ^ D[54] ^
- D[51] ^ D[50] ^ D[49] ^ D[46] ^ D[44] ^ D[43] ^ D[41] ^
- D[40] ^ D[33] ^ D[30] ^ D[28] ^ D[27] ^ D[26] ^ D[25] ^
- D[24] ^ D[22] ^ D[21] ^ D[20] ^ D[12] ^ D[8] ^ D[6] ^
- D[5] ^ D[2] ^ C[1] ^ C[8] ^ C[9] ^ C[11] ^ C[12] ^
- C[14] ^ C[17] ^ C[18] ^ C[19] ^ C[22] ^ C[24] ^ C[25] ^
- C[27] ^ C[29] ^ C[30] ^ C[31];
- NewCRC[29] = D[63] ^ D[62] ^ D[60] ^ D[58] ^ D[57] ^ D[55] ^ D[52] ^
- D[51] ^ D[50] ^ D[47] ^ D[45] ^ D[44] ^ D[42] ^ D[41] ^
- D[34] ^ D[31] ^ D[29] ^ D[28] ^ D[27] ^ D[26] ^ D[25] ^
- D[23] ^ D[22] ^ D[21] ^ D[13] ^ D[9] ^ D[7] ^ D[6] ^
- D[3] ^ C[2] ^ C[9] ^ C[10] ^ C[12] ^ C[13] ^ C[15] ^
- C[18] ^ C[19] ^ C[20] ^ C[23] ^ C[25] ^ C[26] ^ C[28] ^
- C[30] ^ C[31];
- NewCRC[30] = D[63] ^ D[61] ^ D[59] ^ D[58] ^ D[56] ^ D[53] ^ D[52] ^
- D[51] ^ D[48] ^ D[46] ^ D[45] ^ D[43] ^ D[42] ^ D[35] ^
- D[32] ^ D[30] ^ D[29] ^ D[28] ^ D[27] ^ D[26] ^ D[24] ^
- D[23] ^ D[22] ^ D[14] ^ D[10] ^ D[8] ^ D[7] ^ D[4] ^
- C[0] ^ C[3] ^ C[10] ^ C[11] ^ C[13] ^ C[14] ^ C[16] ^
- C[19] ^ C[20] ^ C[21] ^ C[24] ^ C[26] ^ C[27] ^ C[29] ^
- C[31];
- NewCRC[31] = D[62] ^ D[60] ^ D[59] ^ D[57] ^ D[54] ^ D[53] ^ D[52] ^
- D[49] ^ D[47] ^ D[46] ^ D[44] ^ D[43] ^ D[36] ^ D[33] ^
- D[31] ^ D[30] ^ D[29] ^ D[28] ^ D[27] ^ D[25] ^ D[24] ^
- D[23] ^ D[15] ^ D[11] ^ D[9] ^ D[8] ^ D[5] ^ C[1] ^
- C[4] ^ C[11] ^ C[12] ^ C[14] ^ C[15] ^ C[17] ^ C[20] ^
- C[21] ^ C[22] ^ C[25] ^ C[27] ^ C[28] ^ C[30];
-
- nextCRC32_D64 = NewCRC;
-
- end
-
- endfunction
-
-//endmodule
-
diff --git a/fpga/usrp3/lib/xge/rtl/include/CRC32_D8.v b/fpga/usrp3/lib/xge/rtl/include/CRC32_D8.v
deleted file mode 100644
index 814648684..000000000
--- a/fpga/usrp3/lib/xge/rtl/include/CRC32_D8.v
+++ /dev/null
@@ -1,101 +0,0 @@
-///////////////////////////////////////////////////////////////////////
-// File: CRC32_D8.v
-// Date: Fri Feb 8 19:26:59 2008
-//
-// Copyright (C) 1999-2003 Easics NV.
-// This source file may be used and distributed without restriction
-// provided that this copyright statement is not removed from the file
-// and that any derivative work contains the original copyright notice
-// and the associated disclaimer.
-//
-// THIS SOURCE FILE IS PROVIDED "AS IS" AND WITHOUT ANY EXPRESS
-// OR IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
-// WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
-//
-// Purpose: Verilog module containing a synthesizable CRC function
-// * polynomial: (0 1 2 4 5 7 8 10 11 12 16 22 23 26 32)
-// * data width: 8
-//
-// Info: tools@easics.be
-// http://www.easics.com
-///////////////////////////////////////////////////////////////////////
-
-
-//module CRC32_D8;
-
- // polynomial: (0 1 2 4 5 7 8 10 11 12 16 22 23 26 32)
- // data width: 8
- // convention: the first serial data bit is D[7]
- function [31:0] nextCRC32_D8;
-
- input [7:0] Data;
- input [31:0] CRC;
-
- reg [7:0] D;
- reg [31:0] C;
- reg [31:0] NewCRC;
-
- begin
-
- D = Data;
- C = CRC;
-
- NewCRC[0] = D[6] ^ D[0] ^ C[24] ^ C[30];
- NewCRC[1] = D[7] ^ D[6] ^ D[1] ^ D[0] ^ C[24] ^ C[25] ^ C[30] ^
- C[31];
- NewCRC[2] = D[7] ^ D[6] ^ D[2] ^ D[1] ^ D[0] ^ C[24] ^ C[25] ^
- C[26] ^ C[30] ^ C[31];
- NewCRC[3] = D[7] ^ D[3] ^ D[2] ^ D[1] ^ C[25] ^ C[26] ^ C[27] ^
- C[31];
- NewCRC[4] = D[6] ^ D[4] ^ D[3] ^ D[2] ^ D[0] ^ C[24] ^ C[26] ^
- C[27] ^ C[28] ^ C[30];
- NewCRC[5] = D[7] ^ D[6] ^ D[5] ^ D[4] ^ D[3] ^ D[1] ^ D[0] ^ C[24] ^
- C[25] ^ C[27] ^ C[28] ^ C[29] ^ C[30] ^ C[31];
- NewCRC[6] = D[7] ^ D[6] ^ D[5] ^ D[4] ^ D[2] ^ D[1] ^ C[25] ^ C[26] ^
- C[28] ^ C[29] ^ C[30] ^ C[31];
- NewCRC[7] = D[7] ^ D[5] ^ D[3] ^ D[2] ^ D[0] ^ C[24] ^ C[26] ^
- C[27] ^ C[29] ^ C[31];
- NewCRC[8] = D[4] ^ D[3] ^ D[1] ^ D[0] ^ C[0] ^ C[24] ^ C[25] ^
- C[27] ^ C[28];
- NewCRC[9] = D[5] ^ D[4] ^ D[2] ^ D[1] ^ C[1] ^ C[25] ^ C[26] ^
- C[28] ^ C[29];
- NewCRC[10] = D[5] ^ D[3] ^ D[2] ^ D[0] ^ C[2] ^ C[24] ^ C[26] ^
- C[27] ^ C[29];
- NewCRC[11] = D[4] ^ D[3] ^ D[1] ^ D[0] ^ C[3] ^ C[24] ^ C[25] ^
- C[27] ^ C[28];
- NewCRC[12] = D[6] ^ D[5] ^ D[4] ^ D[2] ^ D[1] ^ D[0] ^ C[4] ^ C[24] ^
- C[25] ^ C[26] ^ C[28] ^ C[29] ^ C[30];
- NewCRC[13] = D[7] ^ D[6] ^ D[5] ^ D[3] ^ D[2] ^ D[1] ^ C[5] ^ C[25] ^
- C[26] ^ C[27] ^ C[29] ^ C[30] ^ C[31];
- NewCRC[14] = D[7] ^ D[6] ^ D[4] ^ D[3] ^ D[2] ^ C[6] ^ C[26] ^ C[27] ^
- C[28] ^ C[30] ^ C[31];
- NewCRC[15] = D[7] ^ D[5] ^ D[4] ^ D[3] ^ C[7] ^ C[27] ^ C[28] ^
- C[29] ^ C[31];
- NewCRC[16] = D[5] ^ D[4] ^ D[0] ^ C[8] ^ C[24] ^ C[28] ^ C[29];
- NewCRC[17] = D[6] ^ D[5] ^ D[1] ^ C[9] ^ C[25] ^ C[29] ^ C[30];
- NewCRC[18] = D[7] ^ D[6] ^ D[2] ^ C[10] ^ C[26] ^ C[30] ^ C[31];
- NewCRC[19] = D[7] ^ D[3] ^ C[11] ^ C[27] ^ C[31];
- NewCRC[20] = D[4] ^ C[12] ^ C[28];
- NewCRC[21] = D[5] ^ C[13] ^ C[29];
- NewCRC[22] = D[0] ^ C[14] ^ C[24];
- NewCRC[23] = D[6] ^ D[1] ^ D[0] ^ C[15] ^ C[24] ^ C[25] ^ C[30];
- NewCRC[24] = D[7] ^ D[2] ^ D[1] ^ C[16] ^ C[25] ^ C[26] ^ C[31];
- NewCRC[25] = D[3] ^ D[2] ^ C[17] ^ C[26] ^ C[27];
- NewCRC[26] = D[6] ^ D[4] ^ D[3] ^ D[0] ^ C[18] ^ C[24] ^ C[27] ^
- C[28] ^ C[30];
- NewCRC[27] = D[7] ^ D[5] ^ D[4] ^ D[1] ^ C[19] ^ C[25] ^ C[28] ^
- C[29] ^ C[31];
- NewCRC[28] = D[6] ^ D[5] ^ D[2] ^ C[20] ^ C[26] ^ C[29] ^ C[30];
- NewCRC[29] = D[7] ^ D[6] ^ D[3] ^ C[21] ^ C[27] ^ C[30] ^ C[31];
- NewCRC[30] = D[7] ^ D[4] ^ C[22] ^ C[28] ^ C[31];
- NewCRC[31] = D[5] ^ C[23] ^ C[29];
-
- nextCRC32_D8 = NewCRC;
-
- end
-
- endfunction
-
-//endmodule
-
- \ No newline at end of file
diff --git a/fpga/usrp3/lib/xge/rtl/include/defines.v b/fpga/usrp3/lib/xge/rtl/include/defines.v
deleted file mode 100644
index 095f303bf..000000000
--- a/fpga/usrp3/lib/xge/rtl/include/defines.v
+++ /dev/null
@@ -1,125 +0,0 @@
-//////////////////////////////////////////////////////////////////////
-//// ////
-//// File name "defines.v" ////
-//// ////
-//// This file is part of the "10GE MAC" project ////
-//// http://www.opencores.org/cores/xge_mac/ ////
-//// ////
-//// Author(s): ////
-//// - A. Tanguay (antanguay@opencores.org) ////
-//// ////
-//////////////////////////////////////////////////////////////////////
-//// ////
-//// Copyright (C) 2008 AUTHORS. All rights reserved. ////
-//// ////
-//// This source file may be used and distributed without ////
-//// restriction provided that this copyright statement is not ////
-//// removed from the file and that any derivative work contains ////
-//// the original copyright notice and the associated disclaimer. ////
-//// ////
-//// This source file is free software; you can redistribute it ////
-//// and/or modify it under the terms of the GNU Lesser General ////
-//// Public License as published by the Free Software Foundation; ////
-//// either version 2.1 of the License, or (at your option) any ////
-//// later version. ////
-//// ////
-//// This source is distributed in the hope that it will be ////
-//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
-//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
-//// PURPOSE. See the GNU Lesser General Public License for more ////
-//// details. ////
-//// ////
-//// You should have received a copy of the GNU Lesser General ////
-//// Public License along with this source; if not, download it ////
-//// from http://www.opencores.org/lgpl.shtml ////
-//// ////
-//////////////////////////////////////////////////////////////////////
-
-// Define MDIO to add support for clause 22 and clause 45 MDIO interface
-`define MDIO
-// If WB clock is 62.5MHz and max MDC spec is 2.5MHz, then divide by 25
-//`define MDC_HALF_PERIOD 13 // Closest int to 12.5
-`define MDC_HALF_PERIOD 100
-
-// CPU Registers
-
-`define CPUREG_CONFIG0 8'h00
-`define CPUREG_INT_PENDING 8'h04
-`define CPUREG_INT_STATUS 8'h08
-`define CPUREG_INT_MASK 8'h0c
-//`ifdef MDIO
-`define CPUREG_MDIO_DATA 8'h10
-`define CPUREG_MDIO_ADDR 8'h14
-`define CPUREG_MDIO_OP 8'h18
-`define CPUREG_MDIO_CONTROL 8'h1c
-`define CPUREG_MDIO_STATUS 8'h1c
-`define CPUREG_GPIO 8'h20
-//`endif
-
-// Ethernet codes
-
-`define IDLE 8'h07
-`define PREAMBLE 8'h55
-`define SEQUENCE 8'h9c
-`define SFD 8'hd5
-`define START 8'hfb
-`define TERMINATE 8'hfd
-`define ERROR 8'hfe
-
-
-
-`define LINK_FAULT_OK 2'd0
-`define LINK_FAULT_LOCAL 2'd1
-`define LINK_FAULT_REMOTE 2'd2
-
-`define FAULT_SEQ_LOCAL 1'b0
-`define FAULT_SEQ_REMOTE 1'b1
-
-`define LOCAL_FAULT 8'd1
-`define REMOTE_FAULT 8'd2
-
-`define PAUSE_FRAME 48'h010000c28001
-
-`define LANE0 7:0
-`define LANE1 15:8
-`define LANE2 23:16
-`define LANE3 31:24
-`define LANE4 39:32
-`define LANE5 47:40
-`define LANE6 55:48
-`define LANE7 63:56
-
-
-`define TXSTATUS_NONE 8'h0
-`define TXSTATUS_EOP 3'd6
-`define TXSTATUS_SOP 3'd7
-
-`define RXSTATUS_NONE 8'h0
-`define RXSTATUS_ERR 3'd5
-`define RXSTATUS_EOP 3'd6
-`define RXSTATUS_SOP 3'd7
-
-
-//
-// FIFO Size: 8 * (2^AWIDTH) will be the size in bytes
-// 7 --> 128 entries, 1024 bytes for data fifo
-//
-`define TX_DATA_FIFO_AWIDTH 9
-`define RX_DATA_FIFO_AWIDTH 9
-
-//
-// FIFO Size: Holding FIFOs are 16 deep
-//
-`define TX_HOLD_FIFO_AWIDTH 4
-`define RX_HOLD_FIFO_AWIDTH 4
-
-
-// Memory types
-`define MEM_AUTO_SMALL 1
-`define MEM_AUTO_MEDIUM 2
-`define MEM_AUTO_XILINX 3
-
-
-// Changed system packet interface to big endian (12/12/2009)
-// Comment out to use legacy mode
-`define BIGENDIAN
diff --git a/fpga/usrp3/lib/xge/rtl/include/timescale.v b/fpga/usrp3/lib/xge/rtl/include/timescale.v
deleted file mode 100644
index 64502185f..000000000
--- a/fpga/usrp3/lib/xge/rtl/include/timescale.v
+++ /dev/null
@@ -1 +0,0 @@
-`timescale 1ps / 1ps
diff --git a/fpga/usrp3/lib/xge/rtl/include/utils.v b/fpga/usrp3/lib/xge/rtl/include/utils.v
deleted file mode 100644
index 6137b3e31..000000000
--- a/fpga/usrp3/lib/xge/rtl/include/utils.v
+++ /dev/null
@@ -1,71 +0,0 @@
-//////////////////////////////////////////////////////////////////////
-//// ////
-//// File name "utils.v" ////
-//// ////
-//// This file is part of the "10GE MAC" project ////
-//// http://www.opencores.org/cores/xge_mac/ ////
-//// ////
-//// Author(s): ////
-//// - A. Tanguay (antanguay@opencores.org) ////
-//// ////
-//////////////////////////////////////////////////////////////////////
-//// ////
-//// Copyright (C) 2008 AUTHORS. All rights reserved. ////
-//// ////
-//// This source file may be used and distributed without ////
-//// restriction provided that this copyright statement is not ////
-//// removed from the file and that any derivative work contains ////
-//// the original copyright notice and the associated disclaimer. ////
-//// ////
-//// This source file is free software; you can redistribute it ////
-//// and/or modify it under the terms of the GNU Lesser General ////
-//// Public License as published by the Free Software Foundation; ////
-//// either version 2.1 of the License, or (at your option) any ////
-//// later version. ////
-//// ////
-//// This source is distributed in the hope that it will be ////
-//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
-//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
-//// PURPOSE. See the GNU Lesser General Public License for more ////
-//// details. ////
-//// ////
-//// You should have received a copy of the GNU Lesser General ////
-//// Public License along with this source; if not, download it ////
-//// from http://www.opencores.org/lgpl.shtml ////
-//// ////
-//////////////////////////////////////////////////////////////////////
-
-
-function [63:0] reverse_64b;
- input [63:0] data;
- integer i;
- begin
- for (i = 0; i < 64; i = i + 1) begin
- reverse_64b[i] = data[63 - i];
- end
- end
-endfunction
-
-
-function [31:0] reverse_32b;
- input [31:0] data;
- integer i;
- begin
- for (i = 0; i < 32; i = i + 1) begin
- reverse_32b[i] = data[31 - i];
- end
- end
-endfunction
-
-
-function [7:0] reverse_8b;
- input [7:0] data;
- integer i;
- begin
- for (i = 0; i < 8; i = i + 1) begin
- reverse_8b[i] = data[7 - i];
- end
- end
-endfunction
-
-
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