diff options
Diffstat (limited to 'fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_fft')
| -rw-r--r-- | fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_fft/Makefile | 11 | ||||
| -rw-r--r-- | fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_fft/Makefile.srcs | 2 |
2 files changed, 5 insertions, 8 deletions
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_fft/Makefile b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_fft/Makefile index 868246fbd..14869d7d9 100644 --- a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_fft/Makefile +++ b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_fft/Makefile @@ -1,5 +1,5 @@ # -# Copyright 2019 Ettus Research, A National Instruments Company +# Copyright 2019 Ettus Research, a National Instruments Brand # # SPDX-License-Identifier: LGPL-3.0-or-later # @@ -45,13 +45,10 @@ $(RFNOC_OOT_SRCS) \ #------------------------------------------------- # Testbench Specific #------------------------------------------------- -# Define only one toplevel module -SIM_TOP = rfnoc_block_fft_tb - -# Add test bench, user design under test, and -# additional user created files +SIM_TOP = rfnoc_block_fft_tb glbl SIM_SRCS = \ -$(abspath rfnoc_block_fft_tb.sv) +$(abspath rfnoc_block_fft_tb.sv) \ +$(VIVADO_PATH)/data/verilog/src/glbl.v \ #------------------------------------------------- # Bottom-of-Makefile diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_fft/Makefile.srcs b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_fft/Makefile.srcs index 21ba967f2..b2d823453 100644 --- a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_fft/Makefile.srcs +++ b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_fft/Makefile.srcs @@ -1,5 +1,5 @@ # -# Copyright 2019 Ettus Research, A National Instruments Company +# Copyright 2019 Ettus Research, a National Instruments Brand # # SPDX-License-Identifier: LGPL-3.0-or-later # |