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author | Sam O'Brien <sam.obrien@ni.com> | 2021-08-13 12:02:44 -0500 |
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committer | Aaron Rossetto <aaron.rossetto@ni.com> | 2021-08-13 15:51:04 -0500 |
commit | 3688056acddee03c0cc1b42a066550482b256c57 (patch) | |
tree | 68b6b485c01da7d989cde6d73bd2e2b75cd6f119 /mpm/python/usrp_mpm/periph_manager | |
parent | 439770b964be45e6160cf99a0b1551fdd2002fa9 (diff) | |
download | uhd-3688056acddee03c0cc1b42a066550482b256c57.tar.gz uhd-3688056acddee03c0cc1b42a066550482b256c57.tar.bz2 uhd-3688056acddee03c0cc1b42a066550482b256c57.zip |
mpm: Expose motherboard regs for debugging
There currently isn't a way to access the motherboard register using MPM
(the ones defined in x4xx_global_regs). This commit adds a simple
interface to peek and poke them which is very similar to the current
interface for the daughter board registers.
Signed-off-by: Sam O'Brien <sam.obrien@ni.com>
Diffstat (limited to 'mpm/python/usrp_mpm/periph_manager')
-rw-r--r-- | mpm/python/usrp_mpm/periph_manager/x4xx.py | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/mpm/python/usrp_mpm/periph_manager/x4xx.py b/mpm/python/usrp_mpm/periph_manager/x4xx.py index 995be6c6c..dcb71326d 100644 --- a/mpm/python/usrp_mpm/periph_manager/x4xx.py +++ b/mpm/python/usrp_mpm/periph_manager/x4xx.py @@ -1184,6 +1184,15 @@ class x4xx(ZynqComponents, PeriphManagerBase): """ Poke the PS portion of the MB CPLD """ self.cpld_control.poke32(addr, val) + def peek_mb(self, addr): + """ Peek the MB Regs """ + return '0x{:X}'.format( + self.mboard_regs_control.peek32(addr)) + + def poke_mb(self, addr, val): + """ Poke the MB CPLD """ + self.mboard_regs_control.poke32(addr, val) + def peek_db(self, db_id, addr): """ Peek the DB CPLD, even if the DB is not discovered by MPM """ assert db_id in (0, 1) |