From 3688056acddee03c0cc1b42a066550482b256c57 Mon Sep 17 00:00:00 2001 From: Sam O'Brien Date: Fri, 13 Aug 2021 12:02:44 -0500 Subject: mpm: Expose motherboard regs for debugging There currently isn't a way to access the motherboard register using MPM (the ones defined in x4xx_global_regs). This commit adds a simple interface to peek and poke them which is very similar to the current interface for the daughter board registers. Signed-off-by: Sam O'Brien --- mpm/python/usrp_mpm/periph_manager/x4xx.py | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'mpm/python/usrp_mpm/periph_manager') diff --git a/mpm/python/usrp_mpm/periph_manager/x4xx.py b/mpm/python/usrp_mpm/periph_manager/x4xx.py index 995be6c6c..dcb71326d 100644 --- a/mpm/python/usrp_mpm/periph_manager/x4xx.py +++ b/mpm/python/usrp_mpm/periph_manager/x4xx.py @@ -1184,6 +1184,15 @@ class x4xx(ZynqComponents, PeriphManagerBase): """ Poke the PS portion of the MB CPLD """ self.cpld_control.poke32(addr, val) + def peek_mb(self, addr): + """ Peek the MB Regs """ + return '0x{:X}'.format( + self.mboard_regs_control.peek32(addr)) + + def poke_mb(self, addr, val): + """ Poke the MB CPLD """ + self.mboard_regs_control.poke32(addr, val) + def peek_db(self, db_id, addr): """ Peek the DB CPLD, even if the DB is not discovered by MPM """ assert db_id in (0, 1) -- cgit v1.2.3