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authorMartin Braun <martin.braun@ettus.com>2017-12-12 09:59:50 -0800
committerMartin Braun <martin.braun@ettus.com>2017-12-22 15:05:58 -0800
commitd3e6dd11406893bfbc5537dfbe74d8151bbc1280 (patch)
tree8663263b3c5a4ff7202e01a5f9c5c6bb23969829 /mpm/python/usrp_mpm/dboard_manager
parentea7cc7f8250cd9bdb41c1f22703d38be91fb6a84 (diff)
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mpm: Harmonize imports, tidy + sort modules
- Moved nijesdcore to cores/ - Moved udev, net, dtoverlay, uio to sys_utils/ - Made all imports non-relative (except in __init__.py files) - Removed some unnecessary imports - Reordered some imports for Python conventions
Diffstat (limited to 'mpm/python/usrp_mpm/dboard_manager')
-rw-r--r--mpm/python/usrp_mpm/dboard_manager/__init__.py1
-rw-r--r--mpm/python/usrp_mpm/dboard_manager/base.py2
-rw-r--r--mpm/python/usrp_mpm/dboard_manager/eiscat.py10
-rw-r--r--mpm/python/usrp_mpm/dboard_manager/lmk_eiscat.py2
-rw-r--r--mpm/python/usrp_mpm/dboard_manager/lmk_mg.py3
-rw-r--r--mpm/python/usrp_mpm/dboard_manager/magnesium.py16
-rw-r--r--mpm/python/usrp_mpm/dboard_manager/test.py4
-rw-r--r--mpm/python/usrp_mpm/dboard_manager/unknown.py3
8 files changed, 18 insertions, 23 deletions
diff --git a/mpm/python/usrp_mpm/dboard_manager/__init__.py b/mpm/python/usrp_mpm/dboard_manager/__init__.py
index a06591c81..96d1dfcbe 100644
--- a/mpm/python/usrp_mpm/dboard_manager/__init__.py
+++ b/mpm/python/usrp_mpm/dboard_manager/__init__.py
@@ -17,7 +17,6 @@
"""
dboards module __init__.py
"""
-from .. import libpyusrp_periphs as lib
from .base import DboardManagerBase
from .magnesium import Magnesium
from .eiscat import EISCAT
diff --git a/mpm/python/usrp_mpm/dboard_manager/base.py b/mpm/python/usrp_mpm/dboard_manager/base.py
index 3f5f3adb8..ba82ddb3a 100644
--- a/mpm/python/usrp_mpm/dboard_manager/base.py
+++ b/mpm/python/usrp_mpm/dboard_manager/base.py
@@ -20,7 +20,7 @@ dboard base implementation module
from builtins import object
from six import iteritems
-from ..mpmlog import get_logger
+from usrp_mpm.mpmlog import get_logger
class DboardManagerBase(object):
"""
diff --git a/mpm/python/usrp_mpm/dboard_manager/eiscat.py b/mpm/python/usrp_mpm/dboard_manager/eiscat.py
index 15037086f..bfd3b42a9 100644
--- a/mpm/python/usrp_mpm/dboard_manager/eiscat.py
+++ b/mpm/python/usrp_mpm/dboard_manager/eiscat.py
@@ -21,11 +21,11 @@ EISCAT rx board implementation module
import time
from builtins import range
from builtins import object
-from ..mpmlog import get_logger
-from ..uio import UIO
-from . import lib
-from .base import DboardManagerBase
-from .lmk_eiscat import LMK04828EISCAT
+from usrp_mpm.mpmlog import get_logger
+from usrp_mpm.sys_utils.uio import UIO
+from usrp_mpm import lib
+from usrp_mpm.dboard_manager import DboardManagerBase
+from usrp_mpm.dboard_manager.lmk_eiscat import LMK04828EISCAT
from usrp_mpm.cores import ClockSynchronizer
def create_spidev_iface_sane(dev_node):
diff --git a/mpm/python/usrp_mpm/dboard_manager/lmk_eiscat.py b/mpm/python/usrp_mpm/dboard_manager/lmk_eiscat.py
index 774c10277..421bb0d47 100644
--- a/mpm/python/usrp_mpm/dboard_manager/lmk_eiscat.py
+++ b/mpm/python/usrp_mpm/dboard_manager/lmk_eiscat.py
@@ -19,7 +19,7 @@ LMK04828 driver for use with Magnesium
"""
import time
-from ..chips import LMK04828
+from usrp_mpm.chips import LMK04828
class LMK04828EISCAT(LMK04828):
"""
diff --git a/mpm/python/usrp_mpm/dboard_manager/lmk_mg.py b/mpm/python/usrp_mpm/dboard_manager/lmk_mg.py
index dc3fe203b..1e19aa2f8 100644
--- a/mpm/python/usrp_mpm/dboard_manager/lmk_mg.py
+++ b/mpm/python/usrp_mpm/dboard_manager/lmk_mg.py
@@ -22,8 +22,7 @@ import time
import math
from builtins import zip
from builtins import hex
-from ..mpmlog import get_logger
-from ..chips import LMK04828
+from usrp_mpm.chips import LMK04828
class LMK04828Mg(LMK04828):
def __init__(self, regs_iface, spi_lock, ref_clock_freq, master_clock_freq, log=None):
diff --git a/mpm/python/usrp_mpm/dboard_manager/magnesium.py b/mpm/python/usrp_mpm/dboard_manager/magnesium.py
index 9cbb2bd9b..e43f324af 100644
--- a/mpm/python/usrp_mpm/dboard_manager/magnesium.py
+++ b/mpm/python/usrp_mpm/dboard_manager/magnesium.py
@@ -24,15 +24,15 @@ import time
import threading
import math
from six import iterkeys, iteritems
-from . import lib # Pulls in everything from C++-land
-from .base import DboardManagerBase
-from .. import nijesdcore
-from ..uio import UIO
-from ..mpmlog import get_logger
-from .lmk_mg import LMK04828Mg
-from usrp_mpm.periph_manager.udev import get_eeprom_paths
+from usrp_mpm import lib # Pulls in everything from C++-land
+from usrp_mpm.dboard_manager import DboardManagerBase
+from usrp_mpm.dboard_manager.lmk_mg import LMK04828Mg
+from usrp_mpm.cores import nijesdcore
+from usrp_mpm.mpmlog import get_logger
+from usrp_mpm.sys_utils.uio import UIO
+from usrp_mpm.sys_utils.udev import get_eeprom_paths
+from usrp_mpm.sys_utils.sysfs_gpio import SysFSGPIO
from usrp_mpm.cores import ClockSynchronizer
-from ..sysfs_gpio import SysFSGPIO
from usrp_mpm.bfrfs import BufferFS
from usrp_mpm.mpmutils import poll_with_timeout
diff --git a/mpm/python/usrp_mpm/dboard_manager/test.py b/mpm/python/usrp_mpm/dboard_manager/test.py
index 3dfeab167..eedafe4fd 100644
--- a/mpm/python/usrp_mpm/dboard_manager/test.py
+++ b/mpm/python/usrp_mpm/dboard_manager/test.py
@@ -19,9 +19,7 @@ magnesium dboard implementation module
"""
from builtins import object
-from . import lib
-from .base import DboardManagerBase
-from logging import getLogger
+from usrp_mpm.dboard_manager import DboardManagerBase
class fake_spi(object):
def __init__(self, addr):
diff --git a/mpm/python/usrp_mpm/dboard_manager/unknown.py b/mpm/python/usrp_mpm/dboard_manager/unknown.py
index d954154f9..94e1344cc 100644
--- a/mpm/python/usrp_mpm/dboard_manager/unknown.py
+++ b/mpm/python/usrp_mpm/dboard_manager/unknown.py
@@ -17,8 +17,7 @@
"""
EISCAT rx board implementation module
"""
-from .base import DboardManagerBase
-from logging import getLogger
+from usrp_mpm.dboard_manager import DboardManagerBase
class unknown(DboardManagerBase):
hw_pid = 0