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| author | Martin Braun <martin.braun@ettus.com> | 2019-11-21 16:25:07 -0800 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2019-11-26 12:21:35 -0800 |
| commit | 1c3c7bddff19e0e575b9f411fa73bb2429e4fc66 (patch) | |
| tree | fc01df365406522799e2f021a71a21a74f9ec1ee /mpm/python/usrp_mpm/dboard_manager | |
| parent | 4607c049fa707d9ffced23ddae9f6e79feba095c (diff) | |
| download | uhd-1c3c7bddff19e0e575b9f411fa73bb2429e4fc66.tar.gz uhd-1c3c7bddff19e0e575b9f411fa73bb2429e4fc66.tar.bz2 uhd-1c3c7bddff19e0e575b9f411fa73bb2429e4fc66.zip | |
mpm: mg: Make set_master_clock_rate() an async call
The ad9371 call set_master_clock_rate() can take a while depending on
the rate change, so make it asynchronous in order not to lock out the
reclaimer loop.
Diffstat (limited to 'mpm/python/usrp_mpm/dboard_manager')
| -rw-r--r-- | mpm/python/usrp_mpm/dboard_manager/mg_init.py | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/mpm/python/usrp_mpm/dboard_manager/mg_init.py b/mpm/python/usrp_mpm/dboard_manager/mg_init.py index d2b597c21..5bd2d217a 100644 --- a/mpm/python/usrp_mpm/dboard_manager/mg_init.py +++ b/mpm/python/usrp_mpm/dboard_manager/mg_init.py @@ -556,8 +556,8 @@ class MagnesiumInitManager(object): self.log.debug( "Sample Clocks and Phase DAC Configured Successfully!") # Clocks and PPS are now fully active! - if args.get('skip_rfic', None) == None: - self.mykonos.set_master_clock_rate(master_clock_rate) + if args.get('skip_rfic', None) is None: + async_exec(self.mykonos, "set_master_clock_rate", master_clock_rate) self.init_jesd(jesdcore, master_clock_rate, args) jesdcore = None # Help with garbage collection # That's all that requires access to the dboard regs! |