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-rw-r--r--mpm/python/usrp_mpm/dboard_manager/mg_init.py4
1 files changed, 2 insertions, 2 deletions
diff --git a/mpm/python/usrp_mpm/dboard_manager/mg_init.py b/mpm/python/usrp_mpm/dboard_manager/mg_init.py
index d2b597c21..5bd2d217a 100644
--- a/mpm/python/usrp_mpm/dboard_manager/mg_init.py
+++ b/mpm/python/usrp_mpm/dboard_manager/mg_init.py
@@ -556,8 +556,8 @@ class MagnesiumInitManager(object):
self.log.debug(
"Sample Clocks and Phase DAC Configured Successfully!")
# Clocks and PPS are now fully active!
- if args.get('skip_rfic', None) == None:
- self.mykonos.set_master_clock_rate(master_clock_rate)
+ if args.get('skip_rfic', None) is None:
+ async_exec(self.mykonos, "set_master_clock_rate", master_clock_rate)
self.init_jesd(jesdcore, master_clock_rate, args)
jesdcore = None # Help with garbage collection
# That's all that requires access to the dboard regs!