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author | Ashish Chaudhari <ashish@ettus.com> | 2015-10-15 16:19:27 -0700 |
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committer | Ashish Chaudhari <ashish@ettus.com> | 2015-10-15 16:19:27 -0700 |
commit | c41a7fa386a467ba76d5f09f390cb62a1bfa7282 (patch) | |
tree | 3f458325c74af227b5745ce5390624f8fc94f638 /host/lib/usrp/common/ad9361_ctrl.hpp | |
parent | 09a69b22ae41ca6b9935508d523ae88df58301f3 (diff) | |
parent | eb2f57a6241ce04a3d89c5f41557658387440c3f (diff) | |
download | uhd-c41a7fa386a467ba76d5f09f390cb62a1bfa7282.tar.gz uhd-c41a7fa386a467ba76d5f09f390cb62a1bfa7282.tar.bz2 uhd-c41a7fa386a467ba76d5f09f390cb62a1bfa7282.zip |
Merge branch 'master' into x300/dram
Diffstat (limited to 'host/lib/usrp/common/ad9361_ctrl.hpp')
-rw-r--r-- | host/lib/usrp/common/ad9361_ctrl.hpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/host/lib/usrp/common/ad9361_ctrl.hpp b/host/lib/usrp/common/ad9361_ctrl.hpp index 5c438ee9c..8cd75d539 100644 --- a/host/lib/usrp/common/ad9361_ctrl.hpp +++ b/host/lib/usrp/common/ad9361_ctrl.hpp @@ -89,8 +89,10 @@ public: //! get the clock rate range for the frontend static uhd::meta_range_t get_clock_rate_range(void) { - //return uhd::meta_range_t(220e3, 61.44e6); - return uhd::meta_range_t(5e6, ad9361_device_t::AD9361_MAX_CLOCK_RATE); //5 MHz DCM low end + return uhd::meta_range_t( + ad9361_device_t::AD9361_MIN_CLOCK_RATE, + ad9361_device_t::AD9361_MAX_CLOCK_RATE + ); } //! set the filter bandwidth for the frontend's analog low pass |