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author | Wade Fife <wade.fife@ettus.com> | 2021-03-04 16:27:24 -0600 |
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committer | Wade Fife <wade.fife@ettus.com> | 2021-03-17 17:46:06 -0500 |
commit | ada6a4e46770d22d528b2b6fbc2bdd71e5e3064d (patch) | |
tree | 21ba4229fb195da6fc1da4907ec00aed85a07c6c /host/examples/rfnoc-example/fpga/ip/cmplx_mul/Makefile.inc | |
parent | 866df135adb91299d1009c1b1d2053dd3112acda (diff) | |
download | uhd-ada6a4e46770d22d528b2b6fbc2bdd71e5e3064d.tar.gz uhd-ada6a4e46770d22d528b2b6fbc2bdd71e5e3064d.tar.bz2 uhd-ada6a4e46770d22d528b2b6fbc2bdd71e5e3064d.zip |
examples: Add IP to OOT RFNoC gain example
This updates the gain example to show how to use RFNoC IP, in-tree
Xilinx IP, and out-of-tree Xilinx IP in a custom RFNoC block.
Diffstat (limited to 'host/examples/rfnoc-example/fpga/ip/cmplx_mul/Makefile.inc')
-rw-r--r-- | host/examples/rfnoc-example/fpga/ip/cmplx_mul/Makefile.inc | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/host/examples/rfnoc-example/fpga/ip/cmplx_mul/Makefile.inc b/host/examples/rfnoc-example/fpga/ip/cmplx_mul/Makefile.inc new file mode 100644 index 000000000..14d456146 --- /dev/null +++ b/host/examples/rfnoc-example/fpga/ip/cmplx_mul/Makefile.inc @@ -0,0 +1,17 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +include $(TOOLS_DIR)/make/viv_ip_builder.mak + +LIB_IP_CMPLX_MUL_SRCS = $(IP_BUILD_DIR)/cmplx_mul/cmplx_mul.xci + +LIB_IP_CMPLX_MUL_OUTS = $(addprefix $(IP_BUILD_DIR)/cmplx_mul/, \ +cmplx_mul.xci.out \ +synth/cmplx_mul.vhd \ +) + +$(LIB_IP_CMPLX_MUL_SRCS) $(LIB_IP_CMPLX_MUL_OUTS) : $(OOT_FPGA_DIR)/ip/cmplx_mul/cmplx_mul.xci + $(call BUILD_VIVADO_IP,cmplx_mul,$(ARCH),$(PART_ID),$(OOT_FPGA_DIR)/ip,$(IP_BUILD_DIR),0) |