From ada6a4e46770d22d528b2b6fbc2bdd71e5e3064d Mon Sep 17 00:00:00 2001 From: Wade Fife Date: Thu, 4 Mar 2021 16:27:24 -0600 Subject: examples: Add IP to OOT RFNoC gain example This updates the gain example to show how to use RFNoC IP, in-tree Xilinx IP, and out-of-tree Xilinx IP in a custom RFNoC block. --- .../rfnoc-example/fpga/ip/cmplx_mul/Makefile.inc | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 host/examples/rfnoc-example/fpga/ip/cmplx_mul/Makefile.inc (limited to 'host/examples/rfnoc-example/fpga/ip/cmplx_mul/Makefile.inc') diff --git a/host/examples/rfnoc-example/fpga/ip/cmplx_mul/Makefile.inc b/host/examples/rfnoc-example/fpga/ip/cmplx_mul/Makefile.inc new file mode 100644 index 000000000..14d456146 --- /dev/null +++ b/host/examples/rfnoc-example/fpga/ip/cmplx_mul/Makefile.inc @@ -0,0 +1,17 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +include $(TOOLS_DIR)/make/viv_ip_builder.mak + +LIB_IP_CMPLX_MUL_SRCS = $(IP_BUILD_DIR)/cmplx_mul/cmplx_mul.xci + +LIB_IP_CMPLX_MUL_OUTS = $(addprefix $(IP_BUILD_DIR)/cmplx_mul/, \ +cmplx_mul.xci.out \ +synth/cmplx_mul.vhd \ +) + +$(LIB_IP_CMPLX_MUL_SRCS) $(LIB_IP_CMPLX_MUL_OUTS) : $(OOT_FPGA_DIR)/ip/cmplx_mul/cmplx_mul.xci + $(call BUILD_VIVADO_IP,cmplx_mul,$(ARCH),$(PART_ID),$(OOT_FPGA_DIR)/ip,$(IP_BUILD_DIR),0) -- cgit v1.2.3