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| author | Josh Blum <josh@joshknows.com> | 2010-11-23 14:43:02 -0800 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2010-11-23 14:43:02 -0800 |
| commit | eb26e8adb4a5718ee3db3bb7f32c0cd31d060af9 (patch) | |
| tree | 81dadc83537c2c50550cd94e224571e472176c6f /fpga | |
| parent | 30b223ef5e84a1eb273b06a444038c5cf8d8864a (diff) | |
| download | uhd-eb26e8adb4a5718ee3db3bb7f32c0cd31d060af9.tar.gz uhd-eb26e8adb4a5718ee3db3bb7f32c0cd31d060af9.tar.bz2 uhd-eb26e8adb4a5718ee3db3bb7f32c0cd31d060af9.zip | |
uhd: added new hardware to readme
Diffstat (limited to 'fpga')
| -rw-r--r-- | fpga/usrp2/coregen/_xmsgs/pn_parser.xmsgs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/fpga/usrp2/coregen/_xmsgs/pn_parser.xmsgs b/fpga/usrp2/coregen/_xmsgs/pn_parser.xmsgs index 032a35f41..d946af064 100644 --- a/fpga/usrp2/coregen/_xmsgs/pn_parser.xmsgs +++ b/fpga/usrp2/coregen/_xmsgs/pn_parser.xmsgs @@ -8,7 +8,7 @@ <!-- Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved. --> <messages> -<msg type="info" file="ProjectMgmt" num="1062" ><arg fmt="%s" index="1">Parsing Verilog file "/home/jblum/uhdpriv/fpga/usrp2/coregen/fifo_xlnx_512x36_2clk_18to36.v" into library work</arg> +<msg type="info" file="ProjectMgmt" num="1062" ><arg fmt="%s" index="1">Parsing Verilog file "/home/jblum/uhdpriv/fpga/usrp2/coregen/fifo_xlnx_512x36_2clk_prog_full.v" into library work</arg> </msg> </messages> |