From eb26e8adb4a5718ee3db3bb7f32c0cd31d060af9 Mon Sep 17 00:00:00 2001
From: Josh Blum <josh@joshknows.com>
Date: Tue, 23 Nov 2010 14:43:02 -0800
Subject: uhd: added new hardware to readme

---
 fpga/usrp2/coregen/_xmsgs/pn_parser.xmsgs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'fpga')

diff --git a/fpga/usrp2/coregen/_xmsgs/pn_parser.xmsgs b/fpga/usrp2/coregen/_xmsgs/pn_parser.xmsgs
index 032a35f41..d946af064 100644
--- a/fpga/usrp2/coregen/_xmsgs/pn_parser.xmsgs
+++ b/fpga/usrp2/coregen/_xmsgs/pn_parser.xmsgs
@@ -8,7 +8,7 @@
 <!-- Copyright (c) 1995-2010 Xilinx, Inc.  All rights reserved.    -->
 
 <messages>
-<msg type="info" file="ProjectMgmt" num="1062" ><arg fmt="%s" index="1">Parsing Verilog file &quot;/home/jblum/uhdpriv/fpga/usrp2/coregen/fifo_xlnx_512x36_2clk_18to36.v&quot; into library work</arg>
+<msg type="info" file="ProjectMgmt" num="1062" ><arg fmt="%s" index="1">Parsing Verilog file &quot;/home/jblum/uhdpriv/fpga/usrp2/coregen/fifo_xlnx_512x36_2clk_prog_full.v&quot; into library work</arg>
 </msg>
 
 </messages>
-- 
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