fpga: x400: Add GPIO control via ATR and DB state

5 files changed, 165 insertions, 30 deletions

diff --git a/fpga/usrp3/top/x400/regmap/core_regs_regmap_utils.vh b/fpga/usrp3/top/x400/regmap/core_regs_regmap_utils.vh
index cef263b6d..f3fdde060 100644
--- a/fpga/usrp3/top/x400/regmap/core_regs_regmap_utils.vh
+++ b/fpga/usrp3/top/x400/regmap/core_regs_regmap_utils.vh
@@ -38,4 +38,4 @@
 
   // DIO Window (from x4xx_core_common.v)
   localparam DIO = 'h2000; // Window Offset
-  localparam DIO_SIZE = 'h20;  // size in bytes
+  localparam DIO_SIZE = 'h40;  // size in bytes
diff --git a/fpga/usrp3/top/x400/regmap/dio_regmap_utils.vh b/fpga/usrp3/top/x400/regmap/dio_regmap_utils.vh
index 7598bb1ee..027a464f5 100644
--- a/fpga/usrp3/top/x400/regmap/dio_regmap_utils.vh
+++ b/fpga/usrp3/top/x400/regmap/dio_regmap_utils.vh
@@ -15,11 +15,26 @@
   // DIO_DIRECTION_REGISTER : 0x4 (x4xx_dio.v)
   // DIO_INPUT_REGISTER     : 0x8 (x4xx_dio.v)
   // DIO_OUTPUT_REGISTER    : 0xC (x4xx_dio.v)
+  // DIO_SOURCE_REGISTER    : 0x10 (x4xx_dio.v)
+  // RADIO_SOURCE_REGISTER  : 0x14 (x4xx_dio.v)
+  // INTERFACE_DIO_SELECT   : 0x18 (x4xx_dio.v)
+  // DIO_OVERRIDE           : 0x1C (x4xx_dio.v)
+  // SW_DIO_CONTROL         : 0x20 (x4xx_dio.v)
 
 //===============================================================================
 // RegTypes
 //===============================================================================
 
+  // DIO_CONTROL_REG Type (from x4xx_dio.v)
+  localparam DIO_CONTROL_REG_SIZE = 32;
+  localparam DIO_CONTROL_REG_MASK = 32'hFFF0FFF;
+  localparam DIO_PORT_A_SIZE = 12;  //DIO_CONTROL_REG:DIO_PORT_A
+  localparam DIO_PORT_A_MSB  = 11;  //DIO_CONTROL_REG:DIO_PORT_A
+  localparam DIO_PORT_A      =  0;  //DIO_CONTROL_REG:DIO_PORT_A
+  localparam DIO_PORT_B_SIZE = 12;  //DIO_CONTROL_REG:DIO_PORT_B
+  localparam DIO_PORT_B_MSB  = 27;  //DIO_CONTROL_REG:DIO_PORT_B
+  localparam DIO_PORT_B      = 16;  //DIO_CONTROL_REG:DIO_PORT_B
+
 //===============================================================================
 // Register Group DIO_REGS
 //===============================================================================
@@ -27,43 +42,35 @@
   // DIO_MASTER_REGISTER Register (from x4xx_dio.v)
   localparam DIO_MASTER_REGISTER = 'h0; // Register Offset
   localparam DIO_MASTER_REGISTER_SIZE = 32;  // register width in bits
-  localparam DIO_MASTER_REGISTER_MASK = 32'hFFF0FFF;
-  localparam DIO_MASTER_A_SIZE = 12;  //DIO_MASTER_REGISTER:DIO_MASTER_A
-  localparam DIO_MASTER_A_MSB  = 11;  //DIO_MASTER_REGISTER:DIO_MASTER_A
-  localparam DIO_MASTER_A      =  0;  //DIO_MASTER_REGISTER:DIO_MASTER_A
-  localparam DIO_MASTER_B_SIZE = 12;  //DIO_MASTER_REGISTER:DIO_MASTER_B
-  localparam DIO_MASTER_B_MSB  = 27;  //DIO_MASTER_REGISTER:DIO_MASTER_B
-  localparam DIO_MASTER_B      = 16;  //DIO_MASTER_REGISTER:DIO_MASTER_B
 
   // DIO_DIRECTION_REGISTER Register (from x4xx_dio.v)
   localparam DIO_DIRECTION_REGISTER = 'h4; // Register Offset
   localparam DIO_DIRECTION_REGISTER_SIZE = 32;  // register width in bits
-  localparam DIO_DIRECTION_REGISTER_MASK = 32'hFFF0FFF;
-  localparam DIO_DIRECTION_A_SIZE = 12;  //DIO_DIRECTION_REGISTER:DIO_DIRECTION_A
-  localparam DIO_DIRECTION_A_MSB  = 11;  //DIO_DIRECTION_REGISTER:DIO_DIRECTION_A
-  localparam DIO_DIRECTION_A      =  0;  //DIO_DIRECTION_REGISTER:DIO_DIRECTION_A
-  localparam DIO_DIRECTION_B_SIZE = 12;  //DIO_DIRECTION_REGISTER:DIO_DIRECTION_B
-  localparam DIO_DIRECTION_B_MSB  = 27;  //DIO_DIRECTION_REGISTER:DIO_DIRECTION_B
-  localparam DIO_DIRECTION_B      = 16;  //DIO_DIRECTION_REGISTER:DIO_DIRECTION_B
 
   // DIO_INPUT_REGISTER Register (from x4xx_dio.v)
   localparam DIO_INPUT_REGISTER = 'h8; // Register Offset
   localparam DIO_INPUT_REGISTER_SIZE = 32;  // register width in bits
-  localparam DIO_INPUT_REGISTER_MASK = 32'hFFF0FFF;
-  localparam DIO_INPUT_A_SIZE = 12;  //DIO_INPUT_REGISTER:DIO_INPUT_A
-  localparam DIO_INPUT_A_MSB  = 11;  //DIO_INPUT_REGISTER:DIO_INPUT_A
-  localparam DIO_INPUT_A      =  0;  //DIO_INPUT_REGISTER:DIO_INPUT_A
-  localparam DIO_INPUT_B_SIZE = 12;  //DIO_INPUT_REGISTER:DIO_INPUT_B
-  localparam DIO_INPUT_B_MSB  = 27;  //DIO_INPUT_REGISTER:DIO_INPUT_B
-  localparam DIO_INPUT_B      = 16;  //DIO_INPUT_REGISTER:DIO_INPUT_B
 
   // DIO_OUTPUT_REGISTER Register (from x4xx_dio.v)
   localparam DIO_OUTPUT_REGISTER = 'hC; // Register Offset
   localparam DIO_OUTPUT_REGISTER_SIZE = 32;  // register width in bits
-  localparam DIO_OUTPUT_REGISTER_MASK = 32'hFFF0FFF;
-  localparam DIO_OUTPUT_A_SIZE = 12;  //DIO_OUTPUT_REGISTER:DIO_OUTPUT_A
-  localparam DIO_OUTPUT_A_MSB  = 11;  //DIO_OUTPUT_REGISTER:DIO_OUTPUT_A
-  localparam DIO_OUTPUT_A      =  0;  //DIO_OUTPUT_REGISTER:DIO_OUTPUT_A
-  localparam DIO_OUTPUT_B_SIZE = 12;  //DIO_OUTPUT_REGISTER:DIO_OUTPUT_B
-  localparam DIO_OUTPUT_B_MSB  = 27;  //DIO_OUTPUT_REGISTER:DIO_OUTPUT_B
-  localparam DIO_OUTPUT_B      = 16;  //DIO_OUTPUT_REGISTER:DIO_OUTPUT_B
+
+  // DIO_SOURCE_REGISTER Register (from x4xx_dio.v)
+  localparam DIO_SOURCE_REGISTER = 'h10; // Register Offset
+  localparam DIO_SOURCE_REGISTER_SIZE = 32;  // register width in bits
+
+  // RADIO_SOURCE_REGISTER Register (from x4xx_dio.v)
+  localparam RADIO_SOURCE_REGISTER = 'h14; // Register Offset
+  localparam RADIO_SOURCE_REGISTER_SIZE = 32;  // register width in bits
+
+  // INTERFACE_DIO_SELECT Register (from x4xx_dio.v)
+  localparam INTERFACE_DIO_SELECT = 'h18; // Register Offset
+  localparam INTERFACE_DIO_SELECT_SIZE = 32;  // register width in bits
+
+  // DIO_OVERRIDE Register (from x4xx_dio.v)
+  localparam DIO_OVERRIDE = 'h1C; // Register Offset
+  localparam DIO_OVERRIDE_SIZE = 32;  // register width in bits
+
+  // SW_DIO_CONTROL Register (from x4xx_dio.v)
+  localparam SW_DIO_CONTROL = 'h20; // Register Offset
+  localparam SW_DIO_CONTROL_SIZE = 32;  // register width in bits
diff --git a/fpga/usrp3/top/x400/regmap/gpio_atr_regmap_utils.vh b/fpga/usrp3/top/x400/regmap/gpio_atr_regmap_utils.vh
new file mode 100644
index 000000000..5fcb50c9e
--- /dev/null
+++ b/fpga/usrp3/top/x400/regmap/gpio_atr_regmap_utils.vh
@@ -0,0 +1,97 @@
+//
+// Copyright 2021 Ettus Research, A National Instruments Company
+//
+// SPDX-License-Identifier: LGPL-3.0-or-later
+//
+// Module: gpio_atr_regmap_utils.vh
+// Description:
+// The constants in this file are autogenerated by XmlParse.
+
+//===============================================================================
+// A numerically ordered list of registers and their HDL source files
+//===============================================================================
+
+  // ATR_STATE            : 0x0 (x4xx_gpio_atr.v)
+  // CLASSIC_ATR_CONFIG   : 0x40 (x4xx_gpio_atr.v)
+  // ATR_OPTION_REGISTRER : 0x44 (x4xx_gpio_atr.v)
+  // GPIO_DIR             : 0x48 (x4xx_gpio_atr.v)
+  // GPIO_DISABLED        : 0x4C (x4xx_gpio_atr.v)
+  // GPIO_IN              : 0x50 (x4xx_gpio_atr.v)
+
+//===============================================================================
+// RegTypes
+//===============================================================================
+
+  // GPIO_ATR_STATE Type (from x4xx_gpio_atr.v)
+  localparam GPIO_ATR_STATE_SIZE = 32;
+  localparam GPIO_ATR_STATE_MASK = 32'hFFF0FFF;
+  localparam GPIO_STATE_A_SIZE = 12;  //GPIO_ATR_STATE:GPIO_STATE_A
+  localparam GPIO_STATE_A_MSB  = 11;  //GPIO_ATR_STATE:GPIO_STATE_A
+  localparam GPIO_STATE_A      =  0;  //GPIO_ATR_STATE:GPIO_STATE_A
+  localparam GPIO_STATE_B_SIZE = 12;  //GPIO_ATR_STATE:GPIO_STATE_B
+  localparam GPIO_STATE_B_MSB  = 27;  //GPIO_ATR_STATE:GPIO_STATE_B
+  localparam GPIO_STATE_B      = 16;  //GPIO_ATR_STATE:GPIO_STATE_B
+
+//===============================================================================
+// Register Group GPIO_ATR_REGS
+//===============================================================================
+
+  // ATR_STATE Register (from x4xx_gpio_atr.v)
+  localparam ATR_STATE_COUNT = 16; // Number of elements in array
+
+  // CLASSIC_ATR_CONFIG Register (from x4xx_gpio_atr.v)
+  localparam CLASSIC_ATR_CONFIG = 'h40; // Register Offset
+  localparam CLASSIC_ATR_CONFIG_SIZE = 32;  // register width in bits
+  localparam CLASSIC_ATR_CONFIG_MASK = 32'hFFF0FFF;
+  localparam RF_SELECT_A_SIZE = 12;  //CLASSIC_ATR_CONFIG:RF_SELECT_A
+  localparam RF_SELECT_A_MSB  = 11;  //CLASSIC_ATR_CONFIG:RF_SELECT_A
+  localparam RF_SELECT_A      =  0;  //CLASSIC_ATR_CONFIG:RF_SELECT_A
+  localparam RF_SELECT_B_SIZE = 12;  //CLASSIC_ATR_CONFIG:RF_SELECT_B
+  localparam RF_SELECT_B_MSB  = 27;  //CLASSIC_ATR_CONFIG:RF_SELECT_B
+  localparam RF_SELECT_B      = 16;  //CLASSIC_ATR_CONFIG:RF_SELECT_B
+
+  // ATR_OPTION_REGISTRER Register (from x4xx_gpio_atr.v)
+  localparam ATR_OPTION_REGISTRER = 'h44; // Register Offset
+  localparam ATR_OPTION_REGISTRER_SIZE = 32;  // register width in bits
+  localparam ATR_OPTION_REGISTRER_MASK = 32'h1;
+  localparam ATR_OPTION_SIZE = 1;  //ATR_OPTION_REGISTRER:ATR_OPTION
+  localparam ATR_OPTION_MSB  = 0;  //ATR_OPTION_REGISTRER:ATR_OPTION
+  localparam ATR_OPTION      = 0;  //ATR_OPTION_REGISTRER:ATR_OPTION
+
+  // GPIO_DIR Register (from x4xx_gpio_atr.v)
+  localparam GPIO_DIR = 'h48; // Register Offset
+  localparam GPIO_DIR_SIZE = 32;  // register width in bits
+  localparam GPIO_DIR_MASK = 32'hFFF0FFF;
+  localparam GPIO_DIR_A_SIZE = 12;  //GPIO_DIR:GPIO_DIR_A
+  localparam GPIO_DIR_A_MSB  = 11;  //GPIO_DIR:GPIO_DIR_A
+  localparam GPIO_DIR_A      =  0;  //GPIO_DIR:GPIO_DIR_A
+  localparam GPIO_DIR_B_SIZE = 12;  //GPIO_DIR:GPIO_DIR_B
+  localparam GPIO_DIR_B_MSB  = 27;  //GPIO_DIR:GPIO_DIR_B
+  localparam GPIO_DIR_B      = 16;  //GPIO_DIR:GPIO_DIR_B
+
+  // GPIO_DISABLED Register (from x4xx_gpio_atr.v)
+  localparam GPIO_DISABLED = 'h4C; // Register Offset
+  localparam GPIO_DISABLED_SIZE = 32;  // register width in bits
+  localparam GPIO_DISABLED_MASK = 32'hFFF0FFF;
+  localparam GPIO_DISABLED_A_SIZE = 12;  //GPIO_DISABLED:GPIO_DISABLED_A
+  localparam GPIO_DISABLED_A_MSB  = 11;  //GPIO_DISABLED:GPIO_DISABLED_A
+  localparam GPIO_DISABLED_A      =  0;  //GPIO_DISABLED:GPIO_DISABLED_A
+  localparam GPIO_DISABLED_B_SIZE = 12;  //GPIO_DISABLED:GPIO_DISABLED_B
+  localparam GPIO_DISABLED_B_MSB  = 27;  //GPIO_DISABLED:GPIO_DISABLED_B
+  localparam GPIO_DISABLED_B      = 16;  //GPIO_DISABLED:GPIO_DISABLED_B
+
+  // GPIO_IN Register (from x4xx_gpio_atr.v)
+  localparam GPIO_IN = 'h50; // Register Offset
+  localparam GPIO_IN_SIZE = 32;  // register width in bits
+  localparam GPIO_IN_MASK = 32'hFFF0FFF;
+  localparam GPIO_IN_A_SIZE = 12;  //GPIO_IN:GPIO_IN_A
+  localparam GPIO_IN_A_MSB  = 11;  //GPIO_IN:GPIO_IN_A
+  localparam GPIO_IN_A      =  0;  //GPIO_IN:GPIO_IN_A
+  localparam GPIO_IN_B_SIZE = 12;  //GPIO_IN:GPIO_IN_B
+  localparam GPIO_IN_B_MSB  = 27;  //GPIO_IN:GPIO_IN_B
+  localparam GPIO_IN_B      = 16;  //GPIO_IN:GPIO_IN_B
+
+  // Return the offset of an element of register array ATR_STATE
+  function integer ATR_STATE (input integer i);
+    ATR_STATE = (i * 'h4) + 'h0;
+  endfunction
diff --git a/fpga/usrp3/top/x400/regmap/radio_dio_regmap_utils.vh b/fpga/usrp3/top/x400/regmap/radio_dio_regmap_utils.vh
new file mode 100644
index 000000000..62de3d75e
--- /dev/null
+++ b/fpga/usrp3/top/x400/regmap/radio_dio_regmap_utils.vh
@@ -0,0 +1,31 @@
+//
+// Copyright 2021 Ettus Research, A National Instruments Company
+//
+// SPDX-License-Identifier: LGPL-3.0-or-later
+//
+// Module: radio_dio_regmap_utils.vh
+// Description:
+// The constants in this file are autogenerated by XmlParse.
+
+//===============================================================================
+// A numerically ordered list of registers and their HDL source files
+//===============================================================================
+
+  // RADIO_GPIO_ATR_REGS : 0x0 (x4xx_core_common.v)
+  // DIO_SOURCE_CONTROL  : 0x1000 (x4xx_core_common.v)
+
+//===============================================================================
+// RegTypes
+//===============================================================================
+
+//===============================================================================
+// Register Group DIO_SOURCES
+//===============================================================================
+
+  // RADIO_GPIO_ATR_REGS Window (from x4xx_core_common.v)
+  localparam RADIO_GPIO_ATR_REGS = 'h0; // Window Offset
+  localparam RADIO_GPIO_ATR_REGS_SIZE = 'h1000;  // size in bytes
+
+  // DIO_SOURCE_CONTROL Window (from x4xx_core_common.v)
+  localparam DIO_SOURCE_CONTROL = 'h1000; // Window Offset
+  localparam DIO_SOURCE_CONTROL_SIZE = 'h1000;  // size in bytes
diff --git a/fpga/usrp3/top/x400/regmap/versioning_regs_regmap_utils.vh b/fpga/usrp3/top/x400/regmap/versioning_regs_regmap_utils.vh
index 6f34f9e25..dee16263a 100644
--- a/fpga/usrp3/top/x400/regmap/versioning_regs_regmap_utils.vh
+++ b/fpga/usrp3/top/x400/regmap/versioning_regs_regmap_utils.vh
@@ -85,7 +85,7 @@
   localparam FPGA_CURRENT_VERSION_MINOR            = 'h4;  // FPGA_VERSION:FPGA_CURRENT_VERSION_MINOR
   localparam FPGA_CURRENT_VERSION_MAJOR            = 'h7;  // FPGA_VERSION:FPGA_CURRENT_VERSION_MAJOR
   localparam FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR  = 'h7;  // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR
-  localparam FPGA_VERSION_LAST_MODIFIED_TIME       = 'h21081116;  // FPGA_VERSION:FPGA_VERSION_LAST_MODIFIED_TIME
+  localparam FPGA_VERSION_LAST_MODIFIED_TIME       = 'h21091513;  // FPGA_VERSION:FPGA_VERSION_LAST_MODIFIED_TIME
 
   // Enumerated type RF_CORE_100M_VERSION
   localparam RF_CORE_100M_VERSION_SIZE = 7;