fpga: x400: Add support for X410 motherboard FPGA

Co-authored-by: Andrew Moch <Andrew.Moch@ni.com>
Co-authored-by: Daniel Jepson <daniel.jepson@ni.com>
Co-authored-by: Javier Valenzuela <javier.valenzuela@ni.com>
Co-authored-by: Joerg Hofrichter <joerg.hofrichter@ni.com>
Co-authored-by: Kumaran Subramoniam <kumaran.subramoniam@ni.com>
Co-authored-by: Max Köhler <max.koehler@ni.com>
Co-authored-by: Michael Auchter <michael.auchter@ni.com>
Co-authored-by: Paul Butler <paul.butler@ni.com>
Co-authored-by: Wade Fife <wade.fife@ettus.com>
Co-authored-by: Hector Rubio <hrubio@ni.com>

1 files changed, 36 insertions, 0 deletions

diff --git a/fpga/usrp3/top/x400/ip/eth_100g_bd/PkgEth100gLbus.sv b/fpga/usrp3/top/x400/ip/eth_100g_bd/PkgEth100gLbus.sv
new file mode 100644
index 000000000..588313e55
--- /dev/null
+++ b/fpga/usrp3/top/x400/ip/eth_100g_bd/PkgEth100gLbus.sv
@@ -0,0 +1,36 @@
+//
+// Copyright 2021 Ettus Research, a National Instruments Brand
+//
+// SPDX-License-Identifier: LGPL-3.0-or-later
+//
+// Module: PkgEth100gLbus
+//
+// Description:
+//
+//   Package to define an Lbus record
+//
+
+//-----------------------------------------------------------------------------
+// Lbus interface
+//
+//  This is the segmented local bus interface on the Xilinx CMAC IP
+//  see Xilinx CMAC documentation for detail
+//   https://www.xilinx.com/support/documentation/ip_documentation/cmac_usplus/v2_4/pg203-cmac-usplus.pdf
+//-----------------------------------------------------------------------------
+
+package PkgEth100gLbus;
+
+  localparam DATA_WIDTH = 512;
+  localparam NUM_SEG = 4;
+  localparam SEG_DATA_WIDTH = DATA_WIDTH/NUM_SEG;
+
+  typedef struct packed {
+    logic [SEG_DATA_WIDTH-1:0]  data;
+    logic [$clog2(SEG_DATA_WIDTH/8)-1:0]  mty;
+    logic  sop;
+    logic  eop;
+    logic  err;
+    logic  ena;
+  } lbus_t;
+
+endpackage : PkgEth100gLbus