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authorWade Fife <wade.fife@ettus.com>2020-08-18 12:02:44 -0500
committerWade Fife <wade.fife@ettus.com>2020-08-19 12:28:22 -0500
commit8622a8013a429674de59cbff522b2722c8afa449 (patch)
treeaa61d78afcd9a551988257ebf9620b029a39842a /fpga/usrp3/top/e31x/e31x.v
parent9c4a23f0a2a2d38ace75e4ab29f6f62f64155d81 (diff)
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fpga: e31x: Change RFNoC Ctrl clock to 40 MHz
Diffstat (limited to 'fpga/usrp3/top/e31x/e31x.v')
-rw-r--r--fpga/usrp3/top/e31x/e31x.v1
1 files changed, 1 insertions, 0 deletions
diff --git a/fpga/usrp3/top/e31x/e31x.v b/fpga/usrp3/top/e31x/e31x.v
index 7aece6191..b303f9a91 100644
--- a/fpga/usrp3/top/e31x/e31x.v
+++ b/fpga/usrp3/top/e31x/e31x.v
@@ -849,6 +849,7 @@ module e31x (
.radio_rst(radio_rst),
.bus_clk(bus_clk),
.bus_rst(bus_rst),
+ .clk40(clk40),
// Clocking and PPS Controls/Indicators
.pps_refclk(pps),