From 8622a8013a429674de59cbff522b2722c8afa449 Mon Sep 17 00:00:00 2001
From: Wade Fife <wade.fife@ettus.com>
Date: Tue, 18 Aug 2020 12:02:44 -0500
Subject: fpga: e31x: Change RFNoC Ctrl clock to 40 MHz

---
 fpga/usrp3/top/e31x/e31x.v | 1 +
 1 file changed, 1 insertion(+)

(limited to 'fpga/usrp3/top/e31x/e31x.v')

diff --git a/fpga/usrp3/top/e31x/e31x.v b/fpga/usrp3/top/e31x/e31x.v
index 7aece6191..b303f9a91 100644
--- a/fpga/usrp3/top/e31x/e31x.v
+++ b/fpga/usrp3/top/e31x/e31x.v
@@ -849,6 +849,7 @@ module e31x (
     .radio_rst(radio_rst),
     .bus_clk(bus_clk),
     .bus_rst(bus_rst),
+    .clk40(clk40),
 
     // Clocking and PPS Controls/Indicators
     .pps_refclk(pps),
-- 
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