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| author | Humberto Jimenez <humberto.jimenez@ni.com> | 2018-12-13 16:35:50 -0600 |
|---|---|---|
| committer | Aaron Rossetto <aaron.rossetto@ni.com> | 2021-06-03 10:22:04 -0500 |
| commit | fba23eb42c91ca1bc1108b5ba50c1b567cb9b59d (patch) | |
| tree | 9bcfbccbb420d71a2b878313c1a2d8feadcbc224 /fpga/usrp3/tools/scripts/viv_ip_xci_editor.py | |
| parent | 747746f3909555a942282dd522a97ad4aaec3975 (diff) | |
| download | uhd-fba23eb42c91ca1bc1108b5ba50c1b567cb9b59d.tar.gz uhd-fba23eb42c91ca1bc1108b5ba50c1b567cb9b59d.tar.bz2 uhd-fba23eb42c91ca1bc1108b5ba50c1b567cb9b59d.zip | |
fpga: tools: Add support for RFSoC
This commit includes the following changes to the tools:
- Change part definition in XCI and BD editors for the RFSoC family
- Resolve part name in Vivado IP management utilities with
viv_gen_part_id.py
Diffstat (limited to 'fpga/usrp3/tools/scripts/viv_ip_xci_editor.py')
| -rw-r--r-- | fpga/usrp3/tools/scripts/viv_ip_xci_editor.py | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/fpga/usrp3/tools/scripts/viv_ip_xci_editor.py b/fpga/usrp3/tools/scripts/viv_ip_xci_editor.py index b749b76da..8648c8b5e 100644 --- a/fpga/usrp3/tools/scripts/viv_ip_xci_editor.py +++ b/fpga/usrp3/tools/scripts/viv_ip_xci_editor.py @@ -57,7 +57,11 @@ def main(): if args.action == 'read_partid': print(xci_info['DEVICE'] + '/' + xci_info['PACKAGE'] + '/' + xci_info['SPEEDGRADE'] + '/' + xci_info['TEMPERATURE_GRADE'] + '/' + xci_info['SILICON_REVISION']) if args.action == 'read_part': - print(xci_info['DEVICE'] + xci_info['PACKAGE'] + xci_info['SPEEDGRADE']) + # The UltraScale+ RFSoC family ids are expected diferently in Vivado, a '-' must separate each property. + if xci_info['ARCHITECTURE'] == "zynquplusRFSOC": + print(xci_info['DEVICE'] + "-" + xci_info['PACKAGE'] + xci_info['SPEEDGRADE'] + "-" + xci_info['TEMPERATURE_GRADE']) + else: + print(xci_info['DEVICE'] + xci_info['PACKAGE'] + xci_info['SPEEDGRADE']) elif args.action == 'retarget': # Write a new XCI file with modified target info if not os.path.isdir(args.output_dir): |