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| author | Josh Blum <josh@joshknows.com> | 2012-10-05 14:16:52 -0700 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2012-10-05 14:16:52 -0700 |
| commit | f4eddc3f545cddbf3b78d101b7ac5185944b4f9b (patch) | |
| tree | 626469b4b07e695e2e33e3df85ac32e6c8fb343d /fpga/usrp2/top/E1x0/u1e.v | |
| parent | 3673ffd0921a3b6bf2cc9985ead0e337c001baf3 (diff) | |
| parent | 1db56533253f13dd067234059cf7e471af329dde (diff) | |
| download | uhd-f4eddc3f545cddbf3b78d101b7ac5185944b4f9b.tar.gz uhd-f4eddc3f545cddbf3b78d101b7ac5185944b4f9b.tar.bz2 uhd-f4eddc3f545cddbf3b78d101b7ac5185944b4f9b.zip | |
Merge branch 'fpga_maint' into maint
Diffstat (limited to 'fpga/usrp2/top/E1x0/u1e.v')
| -rw-r--r-- | fpga/usrp2/top/E1x0/u1e.v | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/fpga/usrp2/top/E1x0/u1e.v b/fpga/usrp2/top/E1x0/u1e.v index 903ef7a6f..cdf2a7f0d 100644 --- a/fpga/usrp2/top/E1x0/u1e.v +++ b/fpga/usrp2/top/E1x0/u1e.v @@ -121,7 +121,18 @@ module u1e .D1(1'b1), // 1-bit data input (associated with C1) .R(1'b0), // 1-bit reset input .S(1'b0)); // 1-bit set input - + + // ///////////////////////////////////////////////////////////////////////// + // RX ADC -- handles inversion + + reg [11:0] rx_i, rx_q; + always @(posedge clk_fpga) begin + rx_i <= ~DA; + rx_q <= ~DB; + end + + // ///////////////////////////////////////////////////////////////////////// + // ///////////////////////////////////////////////////////////////////////// // Main U1E Core u1e_core u1e_core(.clk_fpga(clk_fpga), .rst_fpga(~debug_pb), @@ -138,7 +149,7 @@ module u1e .rx_have_data(overo_gpio146), .io_tx(io_tx), .io_rx(io_rx), .tx_i(tx_i), .tx_q(tx_q), - .rx_i(DA), .rx_q(DB), + .rx_i(rx_i), .rx_q(rx_q), .pps_in(PPS_IN), .proc_int(proc_int) ); // ///////////////////////////////////////////////////////////////////////// |