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author | Josh Blum <josh@joshknows.com> | 2011-07-08 12:17:54 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2011-07-08 12:17:54 -0700 |
commit | 17fabccfe4be79f3a5a0a3d7ab14ea72a791ecd9 (patch) | |
tree | e2d0d39d6b44b72c759b8be1380b2024de50bdf6 /fpga/usrp2/sdr_lib/hb_dec_tb.v | |
parent | 60933a242cce0b1ec45e9f948e3da9ab72b2fd90 (diff) | |
parent | 4ea6f7431e09d9f27ecaa1c1b187d2c2f613e8f4 (diff) | |
download | uhd-17fabccfe4be79f3a5a0a3d7ab14ea72a791ecd9.tar.gz uhd-17fabccfe4be79f3a5a0a3d7ab14ea72a791ecd9.tar.bz2 uhd-17fabccfe4be79f3a5a0a3d7ab14ea72a791ecd9.zip |
Merge branch 'fpga_next' into next
Diffstat (limited to 'fpga/usrp2/sdr_lib/hb_dec_tb.v')
-rw-r--r-- | fpga/usrp2/sdr_lib/hb_dec_tb.v | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/fpga/usrp2/sdr_lib/hb_dec_tb.v b/fpga/usrp2/sdr_lib/hb_dec_tb.v index 256f6085d..153cfba76 100644 --- a/fpga/usrp2/sdr_lib/hb_dec_tb.v +++ b/fpga/usrp2/sdr_lib/hb_dec_tb.v @@ -18,7 +18,7 @@ module hb_dec_tb( ) ; // Parameters for instantiation - parameter clocks = 9'd2 ; // Number of clocks per input + parameter clocks = 9'd12 ; // Number of clocks per input parameter decim = 1 ; // Sets the filter to decimate parameter rate = 2 ; // Sets the decimation rate @@ -26,9 +26,9 @@ module hb_dec_tb( ) ; reg reset ; reg enable ; reg strobe_in ; - reg signed [17:0] data_in ; + reg signed [23:0] data_in ; wire strobe_out ; - wire signed [17:0] data_out ; + wire signed [23:0] data_out ; initial begin @@ -65,8 +65,8 @@ module hb_dec_tb( ) ; */ - hb_dec #(.IWIDTH(18),.OWIDTH(18),.CWIDTH(18),.ACCWIDTH(24)) uut - (.clk(clock),.rst(reset),.bypass(0),.cpi(clocks),.stb_in(strobe_in),.data_in(data_in), + hb_dec #(.WIDTH(24)) uut + (.clk(clock),.rst(reset),.bypass(0),.run(1),.cpi(clocks),.stb_in(strobe_in),.data_in(data_in), .stb_out(strobe_out),.data_out(data_out) ); integer i, ri, ro, infile, outfile ; |