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authorJosh Blum <josh@joshknows.com>2012-07-17 12:33:40 -0700
committerJosh Blum <josh@joshknows.com>2012-07-17 12:33:40 -0700
commit1b677b1cc46718ed9473700e2bb88666b70808f3 (patch)
tree9aa45721cb5f7b92f56243527cd2fc912ed3f976 /fpga/usrp2/gpmc/cross_clock_reader.v
parentf3e7f66907bf2d77258ae38a6117927a46fe41a6 (diff)
parent9ecbfeb8ee52b6a59b8757cb259b325cebd05199 (diff)
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Merge branch 'fpga_next' into next
Diffstat (limited to 'fpga/usrp2/gpmc/cross_clock_reader.v')
-rw-r--r--fpga/usrp2/gpmc/cross_clock_reader.v8
1 files changed, 5 insertions, 3 deletions
diff --git a/fpga/usrp2/gpmc/cross_clock_reader.v b/fpga/usrp2/gpmc/cross_clock_reader.v
index a8366badc..b4cdb79c5 100644
--- a/fpga/usrp2/gpmc/cross_clock_reader.v
+++ b/fpga/usrp2/gpmc/cross_clock_reader.v
@@ -27,18 +27,20 @@ module cross_clock_reader
);
reg [WIDTH-1:0] shadow0, shadow1;
+ reg [2:0] count;
always @(posedge clk) begin
if (rst) begin
out <= DEFAULT;
shadow0 <= DEFAULT;
shadow1 <= DEFAULT;
+ count <= 0;
end
- else if (shadow0 == shadow1) begin
- out <= shadow1;
- end
+ else if (shadow0 == shadow1) count <= count + 1;
+ else count <= 0;
shadow0 <= in;
shadow1 <= shadow0;
+ if (count == 3'b111) out <= shadow1;
end
endmodule //cross_clock_reader