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author | Josh Blum <josh@joshknows.com> | 2011-04-19 17:47:36 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2011-04-19 17:47:36 -0700 |
commit | fdee3ba82b997c709e6822aa000df8adb61c56a5 (patch) | |
tree | ed566f55ef024fd2a45d053a719010e1b2c49366 /firmware | |
parent | ee424d797fc37a8c3c2a82a58218bf1e85456226 (diff) | |
parent | 290bb75de236cb53c54bb4599cc2dde924f9800e (diff) | |
download | uhd-fdee3ba82b997c709e6822aa000df8adb61c56a5.tar.gz uhd-fdee3ba82b997c709e6822aa000df8adb61c56a5.tar.bz2 uhd-fdee3ba82b997c709e6822aa000df8adb61c56a5.zip |
Merge branch 'master' into next
Conflicts:
fpga/usrp2/top/u2plus/Makefile.N200
Diffstat (limited to 'firmware')
-rw-r--r-- | firmware/fx2/common/spi.c | 95 | ||||
-rw-r--r-- | firmware/fx2/common/spi.h | 7 | ||||
-rw-r--r-- | firmware/fx2/common/usrp_commands.h | 7 | ||||
-rw-r--r-- | firmware/fx2/usrp1/usrp_main.c | 10 | ||||
-rw-r--r-- | firmware/zpu/usrp2p/bootloader/init_bootloader.c | 11 |
5 files changed, 9 insertions, 121 deletions
diff --git a/firmware/fx2/common/spi.c b/firmware/fx2/common/spi.c index 0c4f63d5a..04a1d8477 100644 --- a/firmware/fx2/common/spi.c +++ b/firmware/fx2/common/spi.c @@ -97,18 +97,13 @@ count_bits8 (unsigned char v) static void write_byte_msb (unsigned char v); -unsigned char -transact_byte_msb (unsigned char v); - static void write_bytes_msb (const xdata unsigned char *buf, unsigned char len); static void read_bytes_msb (xdata unsigned char *buf, unsigned char len); -static void -transact_bytes_msb (xdata unsigned char *buf, unsigned char len); - + // returns non-zero if successful, else 0 unsigned char spi_read (unsigned char header_hi, unsigned char header_lo, @@ -219,93 +214,7 @@ spi_write (unsigned char header_hi, unsigned char header_lo, return 1; // success } -unsigned char -spi_transact (unsigned char data0, unsigned char data1, - unsigned char data2, unsigned char data3, - unsigned char enables, xdata unsigned char *buf, - unsigned char len) -{ - if (count_bits8 (enables) > 1) - return 0; // error, too many enables set - - if (len > 4) - return 0; - - setup_enables (enables); - - buf[0] = data0; - buf[1] = data1; - buf[2] = data2; - buf[3] = data3; - - if (len != 0) - transact_bytes_msb(buf, len); - - disable_all (); - return 1; // success -} - -static unsigned char -transact_byte_msb (unsigned char v) -{ - v = (v << 1) | (v >> 7); // rotate left (MSB into bottom bit) - bitS_OUT = v & 0x1; - bitS_CLK = 1; - v |= bitS_IN; // read into bottom bit - bitS_CLK = 0; - - v = (v << 1) | (v >> 7); - bitS_OUT = v & 0x1; - bitS_CLK = 1; - v |= bitS_IN; - bitS_CLK = 0; - - v = (v << 1) | (v >> 7); - bitS_OUT = v & 0x1; - bitS_CLK = 1; - v |= bitS_IN; - bitS_CLK = 0; - - v = (v << 1) | (v >> 7); - bitS_OUT = v & 0x1; - bitS_CLK = 1; - v |= bitS_IN; - bitS_CLK = 0; - - v = (v << 1) | (v >> 7); - bitS_OUT = v & 0x1; - bitS_CLK = 1; - v |= bitS_IN; - bitS_CLK = 0; - - v = (v << 1) | (v >> 7); - bitS_OUT = v & 0x1; - bitS_CLK = 1; - v |= bitS_IN; - bitS_CLK = 0; - - v = (v << 1) | (v >> 7); - bitS_OUT = v & 0x1; - bitS_CLK = 1; - v |= bitS_IN; - bitS_CLK = 0; - - v = (v << 1) | (v >> 7); - bitS_OUT = v & 0x1; - bitS_CLK = 1; - v |= bitS_IN; - bitS_CLK = 0; - - return v; -} - -static void -transact_bytes_msb (xdata unsigned char *buf, unsigned char len) -{ - while (len-- != 0){ - *buf++ = transact_byte_msb (*buf); - } -} +// ---------------------------------------------------------------- static void write_byte_msb (unsigned char v) diff --git a/firmware/fx2/common/spi.h b/firmware/fx2/common/spi.h index 5342b82b8..12bc5e544 100644 --- a/firmware/fx2/common/spi.h +++ b/firmware/fx2/common/spi.h @@ -39,12 +39,5 @@ spi_write (unsigned char header_hi, unsigned char header_lo, unsigned char enables, unsigned char format, const xdata unsigned char *buf, unsigned char len); -// returns non-zero if successful, else 0 -unsigned char -spi_transact (unsigned char data0, unsigned char data1, - unsigned char data2, unsigned char data3, - unsigned char enables, xdata unsigned char *buf, - unsigned char len); - #endif /* INCLUDED_SPI_H */ diff --git a/firmware/fx2/common/usrp_commands.h b/firmware/fx2/common/usrp_commands.h index 02778c7e3..20c28e264 100644 --- a/firmware/fx2/common/usrp_commands.h +++ b/firmware/fx2/common/usrp_commands.h @@ -54,13 +54,6 @@ // wIndexL: format // len: how much to read -#define VRQ_SPI_TRANSACT 0x83 // wValueH: OUT byte 0 - // wValueL: OUT byte 1 - // wIndexH: OUT byte 2 - // wIndexL: OUT byte 3 - // wLengthH: enables - // wLengthL: transaction length - // OUT commands #define VRQ_SET_LED 0x01 // wValueL off/on {0,1}; wIndexL: which {0,1} diff --git a/firmware/fx2/usrp1/usrp_main.c b/firmware/fx2/usrp1/usrp_main.c index 3eb8c001f..802516c0b 100644 --- a/firmware/fx2/usrp1/usrp_main.c +++ b/firmware/fx2/usrp1/usrp_main.c @@ -118,7 +118,7 @@ app_vendor_cmd (void) EP0BCH = 0; EP0BCL = wLengthL; break; - + case VRQ_SPI_READ: if (!spi_read (wValueH, wValueL, wIndexH, wIndexL, EP0BUF, wLengthL)) return 0; @@ -127,14 +127,6 @@ app_vendor_cmd (void) EP0BCL = wLengthL; break; - case VRQ_SPI_TRANSACT: - if (!spi_transact (wValueH, wValueL, wIndexH, wIndexL, wLengthH, EP0BUF, wLengthL)) - return 0; - - EP0BCH = 0; - EP0BCL = wLengthL; - break; - default: return 0; } diff --git a/firmware/zpu/usrp2p/bootloader/init_bootloader.c b/firmware/zpu/usrp2p/bootloader/init_bootloader.c index 4ae634fb7..d797edce4 100644 --- a/firmware/zpu/usrp2p/bootloader/init_bootloader.c +++ b/firmware/zpu/usrp2p/bootloader/init_bootloader.c @@ -42,15 +42,16 @@ void load_ihex(void) { //simple IHEX parser to load proper records into RAM. loa gets(buf); if(!ihex_parse(buf, &ihex_record)) { //RAM data record is valid - if(ihex_record.addr >= RAM_BASE) { //it's expecting to see FULLY RELOCATED IHX RECORDS. every address referenced to 0x8000, including vectors. - memcpy((void *) (ihex_record.addr), ihex_record.data, ihex_record.length); - puts("OK"); - } else if(ihex_record.type == 1) { //end of record + if(ihex_record.type == 1) { //end of record puts("OK"); //load main firmware start_program(); puts("ERROR: main image returned! Back in IHEX load mode."); - } else puts("NOK"); //RAM loads do not support extended segment address records (04) -- upper 16 bits are always "0". + } else { + const uint8_t *destination = (uint8_t *)ihex_record.addr + RAM_BASE; + memcpy((void *) destination, ihex_record.data, ihex_record.length); + puts("OK"); + } } else puts("NOK"); } } |