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author | Wade Fife <wade.fife@ettus.com> | 2020-06-17 17:24:27 -0500 |
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committer | Aaron Rossetto <aaron.rossetto@ni.com> | 2020-06-18 10:23:04 -0500 |
commit | ade82b6ae415bd8752a5536e0e10ab8aed818342 (patch) | |
tree | a9c8069a1c7350546677043b8588378362351f60 | |
parent | ade5e6d57ed00641782595cc574297ab1b235f08 (diff) | |
download | uhd-ade82b6ae415bd8752a5536e0e10ab8aed818342.tar.gz uhd-ade82b6ae415bd8752a5536e0e10ab8aed818342.tar.bz2 uhd-ade82b6ae415bd8752a5536e0e10ab8aed818342.zip |
rfnoc: Add makefile_srcs to block YAML
-rw-r--r-- | host/include/uhd/rfnoc/blocks/addsub.yml | 1 | ||||
-rw-r--r-- | host/include/uhd/rfnoc/blocks/fir_filter.yml | 1 | ||||
-rw-r--r-- | host/include/uhd/rfnoc/blocks/fosphor.yml | 1 | ||||
-rw-r--r-- | host/include/uhd/rfnoc/blocks/split_stream.yml | 1 | ||||
-rw-r--r-- | host/include/uhd/rfnoc/blocks/vector_iir.yml | 1 |
5 files changed, 5 insertions, 0 deletions
diff --git a/host/include/uhd/rfnoc/blocks/addsub.yml b/host/include/uhd/rfnoc/blocks/addsub.yml index 6e1bd671e..455d065a3 100644 --- a/host/include/uhd/rfnoc/blocks/addsub.yml +++ b/host/include/uhd/rfnoc/blocks/addsub.yml @@ -4,6 +4,7 @@ version: 1.0 rfnoc_version: 1.0 chdr_width: 64 noc_id: 0xADD00000 +makefile_srcs: "${fpga_lib_dir}/blocks/rfnoc_block_addsub/Makefile.srcs" parameters: USE_IMPL: '"Verilog"' diff --git a/host/include/uhd/rfnoc/blocks/fir_filter.yml b/host/include/uhd/rfnoc/blocks/fir_filter.yml index 4e9281b68..96863653b 100644 --- a/host/include/uhd/rfnoc/blocks/fir_filter.yml +++ b/host/include/uhd/rfnoc/blocks/fir_filter.yml @@ -4,6 +4,7 @@ version: 1.0 rfnoc_version: 1.0 chdr_width: 64 noc_id: 0xF1120000 +makefile_srcs: "${fpga_lib_dir}/blocks/rfnoc_block_fir_filter/Makefile.srcs" parameters: NUM_PORTS: 1 diff --git a/host/include/uhd/rfnoc/blocks/fosphor.yml b/host/include/uhd/rfnoc/blocks/fosphor.yml index 8890e1f90..caa05a796 100644 --- a/host/include/uhd/rfnoc/blocks/fosphor.yml +++ b/host/include/uhd/rfnoc/blocks/fosphor.yml @@ -4,6 +4,7 @@ version: 1.0 rfnoc_version: 1.0 chdr_width: 64 noc_id: 0x666F0000 +makefile_srcs: "${fpga_lib_dir}/blocks/rfnoc_block_fosphor/Makefile.srcs" clocks: - name: rfnoc_chdr diff --git a/host/include/uhd/rfnoc/blocks/split_stream.yml b/host/include/uhd/rfnoc/blocks/split_stream.yml index 0fdabbe0b..d81fde580 100644 --- a/host/include/uhd/rfnoc/blocks/split_stream.yml +++ b/host/include/uhd/rfnoc/blocks/split_stream.yml @@ -4,6 +4,7 @@ version: 1.0 rfnoc_version: 1.0 chdr_width: 64 noc_id: 0x57570000 +makefile_srcs: "${fpga_lib_dir}/blocks/rfnoc_block_split_stream/Makefile.srcs" parameters: NUM_PORTS: 1 diff --git a/host/include/uhd/rfnoc/blocks/vector_iir.yml b/host/include/uhd/rfnoc/blocks/vector_iir.yml index e04c832d6..40f3f30e2 100644 --- a/host/include/uhd/rfnoc/blocks/vector_iir.yml +++ b/host/include/uhd/rfnoc/blocks/vector_iir.yml @@ -4,6 +4,7 @@ version: 1.0 rfnoc_version: 1.0 chdr_width: 64 noc_id: 0x11120000 +makefile_srcs: "${fpga_lib_dir}/blocks/rfnoc_block_vector_iir/Makefile.srcs" parameters: NUM_PORTS: 1 |