aboutsummaryrefslogtreecommitdiffstats
path: root/kicad-dart-70
Commit message (Expand)AuthorAgeFilesLines
* Assemble TX FE and update commentsMatthias P. Braendli2023-04-138-15/+29
* Update rx fe schematic as assembledMatthias P. Braendli2023-04-077-42/+45
* Fix BF988 footprintMatthias P. Braendli2023-04-049-1194/+1095
* Continue DART assembly nad fix some issuesMatthias P. Braendli2023-04-0310-94250/+4516
* Fix MABA footprintMatthias P. Braendli2023-03-286-355/+2913
* Fix DART-70 things seen during assemblyMatthias P. Braendli2023-03-259-541/+347
* Update to kicad 7.0.1Matthias P. Braendli2023-03-1310-154254/+117655
* Run ERC and DRC, fix silkscreenMatthias P. Braendli2023-03-099-2394/+2367
* Add header for optional DCDCMatthias P. Braendli2023-03-094-7668/+7683
* Make board a bit smallerMatthias P. Braendli2023-03-084-22779/+110456
* Rework board outline and interior milling pathsMatthias P. Braendli2023-03-089-140715/+146507
* Reannotate, add usbaudio schematicMatthias P. Braendli2023-03-069-9017/+10603
* Add USB Audio codecMatthias P. Braendli2023-03-067-90278/+137959
* Replace power connectorMatthias P. Braendli2023-03-068-132158/+400
* Add antenna voltage, separate EN_TX and EN_PAMatthias P. Braendli2023-03-069-8564/+99540
* Update schematic order and todoMatthias P. Braendli2023-03-026-157/+307
* Do via stitchingMatthias P. Braendli2023-02-255-91921/+6286
* Adapt README and schematic notesMatthias P. Braendli2023-02-258-6765/+8740
* Replace PIN diodeMatthias P. Braendli2023-02-247-8106/+96247
* ERC and DRCMatthias P. Braendli2023-02-196-6924/+7380
* Improve MICSPKMatthias P. Braendli2023-02-193-1268/+1230
* Remove the mounting holes for vertical boards, solder headers insteadMatthias P. Braendli2023-02-194-7026/+863
* Rework placement and front connector board size, add digi input with VOX PTTMatthias P. Braendli2023-02-199-118054/+31109
* Add DART-70 logoMatthias P. Braendli2023-02-163-124/+88498
* More routing, start moving silkscreenMatthias P. Braendli2023-02-128-5968/+138280
* Move PA LPF to PA board and other changesMatthias P. Braendli2023-02-0810-1998/+3515
* Place and route PAMatthias P. Braendli2023-02-078-87161/+6226
* Continue placement and refine schematicMatthias P. Braendli2023-02-077-5561/+86913
* Place frontendsMatthias P. Braendli2023-02-053-88181/+25
* Separate TX and RX frontendsMatthias P. Braendli2023-02-053-2766/+3336
* Place parts of frontendMatthias P. Braendli2023-02-055-1989/+2537
* More placementMatthias P. Braendli2023-02-054-1135/+86926
* Continue placementMatthias P. Braendli2023-02-035-4194/+5877
* Define all footprintsMatthias P. Braendli2023-02-029-950/+28667
* AnnotateMatthias P. Braendli2023-02-025-1206/+1585
* Run ERCMatthias P. Braendli2023-02-025-4134/+1529
* Review componentsMatthias P. Braendli2023-02-016-90939/+5326
* Update schematicMatthias P. Braendli2023-01-315-2134/+856
* Replace all GNDA by GNDMatthias P. Braendli2023-01-295-547/+3307
* Calculate diplexer valuesMatthias P. Braendli2023-01-295-969/+1733
* Add rx gain stageMatthias P. Braendli2023-01-244-774/+1547
* Add PA lowpass filter valuesMatthias P. Braendli2023-01-242-201/+205
* Add RX filterMatthias P. Braendli2023-01-242-972/+1494
* Add connectors for FE, PA and ControlMatthias P. Braendli2023-01-236-3298/+4739
* Update TODOsMatthias P. Braendli2023-01-235-935/+196
* Add PA_70Matthias P. Braendli2023-01-225-3066/+7832
* Change 70MHz filterMatthias P. Braendli2023-01-226-2192/+2192
* Add 70MHz frontendMatthias P. Braendli2023-01-214-18/+91855
* Schematic workMatthias P. Braendli2023-01-213-738/+1505
* Totally rework DART-70 basebandMatthias P. Braendli2023-01-203-5384/+5598
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-21 18:29:32 +0000