Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Add Ampere to back silkscreen and update MPN | Matthias P. Braendli | 2019-10-22 | 1 | -2248/+14226 |
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* | Correct wrong DCDC inductor | Matthias P. Braendli | 2019-10-22 | 1 | -1636/+1664 |
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* | Minor routing changes | Matthias P. Braendli | 2019-10-22 | 1 | -358/+330 |
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* | Run DRC and ERC | Matthias P. Braendli | 2019-10-21 | 1 | -0/+23 |
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* | Change R and C to 0805, improve silkscreen | Matthias P. Braendli | 2019-10-21 | 1 | -4444/+4452 |
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* | Add pullups on CSn and UART TX | Matthias P. Braendli | 2019-10-19 | 1 | -934/+1041 |
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* | Add resistor network on relay control signals | Matthias P. Braendli | 2019-10-19 | 1 | -1414/+1621 |
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* | Add second UART output for Raspi | Matthias P. Braendli | 2019-10-18 | 1 | -2351/+2720 |
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* | Add relays | Matthias P. Braendli | 2019-09-09 | 1 | -2369/+3730 |
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* | Move power supply to separate sheet | Matthias P. Braendli | 2019-09-09 | 1 | -860/+863 |
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* | Update TODO, minor routing | Matthias P. Braendli | 2019-08-19 | 1 | -1414/+1425 |
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* | Rework some routing | Matthias P. Braendli | 2019-07-24 | 1 | -1596/+1612 |
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* | Change LM324 footprint to SOIC | Matthias P. Braendli | 2019-07-24 | 1 | -1785/+1710 |
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* | Place and route PCB | Matthias P. Braendli | 2019-07-24 | 1 | -0/+5339 |