opencores/spi/bench/verilog/CVS/Entries


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/spi_slave_model.v/1.2/Wed Mar 26 16:00:03 2003//
/tb_spi_top.v/1.6/Mon Mar 15 17:46:04 2004//
/wb_master_model.v/1.1.1.1/Wed Jun 12 15:45:23 2002//
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