blob: 6c46d0a351628121f079e5b412eedd8caa950253 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
|
//
// Copyright 2010 Ettus Research LLC
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) any later version.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program. If not, see <http://www.gnu.org/licenses/>.
//
#ifndef INCLUDED_USRP2_CLK_REGS_HPP
#define INCLUDED_USRP2_CLK_REGS_HPP
#include "usrp2_iface.hpp"
class usrp2_clk_regs_t {
public:
usrp2_clk_regs_t(void) { ; }
usrp2_clk_regs_t(usrp2_iface::rev_type rev) {
test = 0;
fpga = 1;
dac = 3;
switch(rev) {
case usrp2_iface::USRP2_REV3:
exp = 2;
adc = 4;
serdes = 2;
tx_db = 6;
break;
case usrp2_iface::USRP2_REV4:
exp = 5;
adc = 4;
serdes = 2;
tx_db = 6;
break;
case usrp2_iface::USRP_N200:
case usrp2_iface::USRP_N210:
exp = 6;
adc = 2;
serdes = 4;
tx_db = 5;
break;
case usrp2_iface::USRP_NXXX:
//dont throw, it may be unitialized
break;
}
rx_db = 7;
}
static int output(int clknum) { return 0x3C + clknum; }
static int div_lo(int clknum) { return 0x48 + 2 * clknum; }
static int div_hi(int clknum) { return 0x49 + 2 * clknum; }
const static int acounter = 0x04;
const static int bcounter_msb = 0x05;
const static int bcounter_lsb = 0x06;
const static int pll_1 = 0x07;
const static int pll_2 = 0x08;
const static int pll_3 = 0x09;
const static int pll_4 = 0x0A;
const static int ref_counter_msb = 0x0B;
const static int ref_counter_lsb = 0x0C;
const static int pll_5 = 0x0D;
const static int update = 0x5A;
int test;
int fpga;
int adc;
int dac;
int serdes;
int exp;
int tx_db;
int rx_db;
};
#endif //INCLUDED_USRP2_CLK_REGS_HPP
|
