blob: f7dfd4503ebb1224c91531407ae76eeb4d9de000 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
|
#
# Copyright 2016 Ettus Research
#
include $(BASE_DIR)/../tools/make/viv_preamble.mak
SIMULATION = 1
SIM_RUNTIME_US = 1000000000
# -------------------------------------------------------------------
# Setup simulation
# -------------------------------------------------------------------
# Define part using PART_ID (<device>/<package>/<speedgrade>)
# and architecture (zynq, kintex7, or artix7)
#
# Most simulations are part agnostic, but the user can override
# these if needed in the makefile in the simulation directory
#
ARCH ?= kintex7
PART_ID ?= xc7k410t/ffg900/-2
# Include makefiles and sources for the DUT and its dependencies
include $(BASE_DIR)/../lib/sim/Makefile.srcs
DESIGN_SRCS = $(abspath $(SIM_DESIGN_SRCS))
# Include interfaces and classes
include $(BASE_DIR)/../sim/general/Makefile.srcs
include $(BASE_DIR)/../sim/axi/Makefile.srcs
include $(BASE_DIR)/../sim/control/Makefile.srcs
include $(BASE_DIR)/../sim/rfnoc/Makefile.srcs
include $(BASE_DIR)/../sim/packages/Makefile.srcs
INC_SRCS = $(abspath \
$(SIM_GENERAL_SRCS) \
$(SIM_AXI_SRCS) \
$(SIM_CONTROL_SRCS) \
$(SIM_RFNOC_SRCS) \
$(SIM_PACKAGES_SRCS) \
)
# Predeclare RFNOC_OOT_SRCS to make sure it's not recursively expanded
RFNOC_OOT_SRCS :=
# Debug target
vars::
env
@echo "ARCH=$(ARCH)"
@echo "PART_ID=$(PART_ID)"
all:
$(error "all" or "<empty>" is not a valid target. Run make help for a list of supported targets.)
ipclean:
@rm -rf $(abspath ./build-ip)
help::
@echo "-----------------"
@echo "Supported Targets"
@echo "-----------------"
@echo "ipclean: Cleanup all IP intermediate files"
@echo "clean: Cleanup all simulator intermediate files"
@echo "cleanall: Cleanup everything!"
cleanall: ipclean clean
.PHONY: ipclean cleanall help
|
