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path: root/fpga/usrp3/sim/duc_chain_x300/dctest/run_isim
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rm -rf fuse* *.exe isim
vlogcomp -work work ${XILINX}/verilog/src/glbl.v
vlogcomp -work work --sourcelibext .v \
	 --sourcelibdir ../../../lib/dsp \
         --sourcelibdir ../../../lib/control \
	 --sourcelibdir ../../../top/x300/coregen_dsp \
	 --sourcelibdir ${XILINX}/verilog/src/unimacro \
	 ../../../lib/dsp/duc_chain_x300_tb.v



fuse work.duc_chain_x300_tb work.glbl -L unisims_ver -L xilinxcorelib_ver -o duc_chain_x300_tb.exe

# run the simulation scrip
./duc_chain_x300_tb.exe  -tclbatch simcmds.tcl  # -gui