blob: 74ba3b48a5bcf4e8b15da40428be5e74cb5b9512 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
|
#
# Copyright 2013 Ettus Research LLC
# Copyright 2017 Ettus Research, a National Instruments Company
#
# SPDX-License-Identifier: LGPL-3.0-or-later
#
##################################################
# Control Lib Sources
##################################################
CONTROL_LIB_SRCS = $(abspath $(addprefix $(BASE_DIR)/../lib/control/, \
ad5662_auto_spi.v \
arb_qualify_master.v \
axi_crossbar.v \
axi_crossbar_regport.v \
axi_fifo_header.v \
axi_forwarding_cam.v \
axi_setting_reg.v \
axi_slave_mux.v \
axi_test_vfifo.v \
bin2gray.v \
binary_encoder.v \
db_control.v \
fe_control.v \
filter_bad_sid.v \
gpio_atr_io.v \
gpio_atr.v \
gray2bin.v \
por_gen.v \
priority_encoder_one_hot.v \
priority_encoder.v \
ram_2port_impl.vh \
ram_2port.v \
reset_sync.v \
s7_icap_wb.v \
serial_to_settings.v \
setting_reg.v \
settings_bus_mux.v \
settings_bus_timed_2clk.v \
simple_i2c_core.v \
simple_spi_core.v \
simple_spi_core_64bit.v \
synchronizer_impl.v \
synchronizer.v \
pulse_synchronizer.v \
user_settings.v \
axil_regport_master.v \
axil_to_ni_regport.v \
regport_resp_mux.v \
regport_to_xbar_settingsbus.v \
regport_to_settingsbus.v \
pulse_stretch.v \
pulse_stretch_min.v \
mdio_master.v \
map/cam_priority_encoder.v \
map/cam_bram.v \
map/cam_srl.v \
map/cam.v \
map/kv_map.v \
map/axis_muxed_kv_map.v \
axil_ctrlport_master.v\
handshake.v\
))
|
