summaryrefslogtreecommitdiffstats
path: root/fpga/usrp2/top/E1x0/cmdfile
blob: 291c723b8c730dacec1a3b726d7d65b5c8e2f6b3 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
# My stuff
-y .
-y ../../control_lib
-y ../../control_lib/newfifo
-y ../../sdr_lib
-y ../../timing
-y ../../coregen
-y ../../gpmc

# Models
-y ../../models
-y /opt/Xilinx/10.1/ISE/verilog/src/unisims

# Open Cores
-y ../../opencores/spi/rtl/verilog
+incdir+../../opencores/spi/rtl/verilog
-y ../../opencores/i2c/rtl/verilog
+incdir+../../opencores/i2c/rtl/verilog