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path: root/fpga/usrp2/extramfifo/ext_fifo_tb.sh
blob: dcfede37ab0853633573d1420eeacc9c2eb2ec3e (plain)
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#fuse  -prj ext_fifo_tb.prj  -t work.glbl -t work.ext_fifo_tb -L unisims_ver -L xilinxcorelib_ver -o ext_fifo_tb
iverilog -c ext_fifo_tb.cmd -o ext_fifo_tb ext_fifo_tb.v