Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | connected spi pins, but the spi core still needs to be redone for 16 bit inte... | Matt Ettus | 2010-03-25 | 1 | -7/+5 |
* | debug pins | Matt Ettus | 2010-02-25 | 1 | -2/+3 |
* | gpmc debug pins | Matt Ettus | 2010-02-25 | 1 | -3/+6 |
* | loopback and test | Matt Ettus | 2010-02-25 | 1 | -2/+32 |
* | First cut at passing data buffers around on GPMC bus | Matt Ettus | 2010-02-25 | 1 | -6/+14 |
* | use our fancy new debug ports | Matt Ettus | 2010-02-23 | 1 | -0/+3 |
* | settings bus with 16 bit wishbone interface, put on the main wishbone in u1e | Matt Ettus | 2010-02-22 | 1 | -2/+13 |
* | GPIOs now on the wishbone interface | Matt Ettus | 2010-02-22 | 1 | -2/+17 |
* | added gpio control to the wishbone | Matt Ettus | 2010-02-18 | 1 | -10/+13 |
* | Added I2C, UART, debug pins, misc wishbone stuff | Matt Ettus | 2010-02-18 | 1 | -27/+158 |
* | wishbone bridge now with minimal functionality. Need to check | Matt Ettus | 2010-02-16 | 1 | -5/+4 |
* | first cut at gpmc <-> wb bridge, split u1e into core, top, and tb | Matt Ettus | 2010-02-16 | 1 | -0/+52 |